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datashee t product structure : silicon monolithic integrated circuit this product has no designed protec tion against radioactive rays . 1/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 tsz22111 14 001 www.rohm.com the 24bit audio codec series monaural audio codec with touch panel interface bu26154muv general description bu26154 is a low-power compact audio codec. bu26154 also incorporates touch panel interface and cap-less headphones amplifier, speaker amplifier which is most suitable for digital still cameras, electronic dictionaries. bu26154 has built-in voltage regulator for the stability of codec characteri stic that is sensitive to the outside noise. speaker amplifier that can change ab / d class. therefore, when t he interference including the fm radio influences it, bu26154 can prevent interference by operating ab grade. as digital code processing, it is equipped with the high-pass filter as the noise cut use of the specific frequency band, notch filter and the equalizer of 5 bands and p 2 bass+, noise gate, and flexible sound quality effect processing is possible. features various sound processing functions ? p 2 bass+ ? noise gate ? fast release alc ? 5-band equalizer/notch filter high psrr is attained by built-in regulator speaker amplifier can be switched to ab class and d class. touch panel interface. applications electronic dictionary digital still camera digital single-lens reflex camera digital mirror-less camera digital video camera, others key specifications hvdd power supply: 2.7v to 3.6v ? spvdd power supply: 2.7v to 5.5v ? cpdd power supply: 2.7v to 3.6v ? tvdd power supply: 2.7v to 3.6v ? mic-adc snr: 92db(typ) ? dac-sp snr: 95db (typ) ? dac-hp snr: 93db (typ) package(s) w (typ) x d (typ) x h (max) vqfn040v6060 6.00mm x 6.00mm x 1.00mm typical application circuit(s) figure 1. block diagram vqfn040v6060 al filter sound effect sp spout+ spout- mibias lok pll serial audio interfac e mlki sai_sout sai_sin sai_blk sai_lrlk sata/sa slk sb/sl resetb pu i/f hv1 hgn2 vmi lo hpl reset tsto regout regout hpv spv regout hv regout regout regout regout regout a regout hpr hpv mbiasap min1 min2 hp pga io io io io iov iov iov iov pp pn hpv hpvss hp hpvss xp xn yp yn touh panel i/f tv tv hpvss tgn regout pgn bias lass ab or lass pll a a irqb vol vol hpvss harge pump pv hpv lo spv spgn hpom hgn1 downloaded from: http:///
datasheet d a t a s h e e t 2/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv pin configuration(s) top view figure 2. pin configuration(s) pin description(s) no name i/o power function reset (note1) no use (note3) 17 hvdd p - high voltage power supply pin a capacitor is connected between hvdd and hgnd1. - - 6 spvdd p - speaker power supply pin a capacitor is connect ed between spvdd and spgnd. - - 38 cpvdd p - voltage power supply pin for charge pump a capacitor is connected between cpvdd and cpgnd. - - 16 n.c - - a no connect pin. - - 36 tvdd p - voltage power supply for the touch panel please connect a capacitor between tvdd and tgnd. - - 15 hgnd1 p - high voltage ground 1 it is used on the same voltage as hgnd2, spgnd, cpgnd, and tgnd. - - 14 hgnd2 p - high voltage ground 2 it is used on the same voltage as hgnd1, spgnd, cpgnd, and tgnd. - - 9 spgnd p - ground pin for speaker it is used on the same voltage as hgnd1, hgnd2, cpgnd, and tgnd. - - 3 cpgnd p - ground pin for charge pump it is used on the same voltage as hgnd1, hgnd2, spgnd, and tgnd. - - 35 tgnd p - ground pin for touch panel interface it is used on the same voltage as hgnd1, hgnd2, cpgnd, and spgnd. - - 18 regout o hvdd regulator output a capacitor is connected between regout and hgnd1. please connect as close as possible to the chip. hgnd2 - sdata/sda sai_sdout 3132 33 34 35 36 37 38 39 40 123456 7 8910 2019 18 17 16 15 14 13 12 11 30 29 28 27 26 25 24 23 22 21 resetb spgnd spout- vmid mbiascap spvdd spout+ xn cpvdd yn cpp tgnd hpr tvdd hpcom hpl hpvss regout sai_bclk sai_sdin csb/scl yp irqb xp nc sai_lrclk mclki sclk/sad hvdd hpvdd hgnd1 cpgnd hgnd2 tsto min1 min2 cpn pllc sdata/sda sai_sdout 3132 33 34 35 36 37 38 39 40 123456 7 8910 2019 18 17 16 15 14 13 12 11 30 29 28 27 26 25 24 23 22 21 resetb spgnd spout- vmid mbiascap spvdd spout+ xn cpvdd yn cpp tgnd hpr tvdd hpcom hpl hpvss regout sai_bclk sai_sdin csb/scl yp irqb xp nc sai_lrclk mclki sclk/sad hvdd hpvdd hgnd1 cpgnd hgnd2 tsto min1 min2 cpn pllc downloaded from: http:///
datasheet d a t a s h e e t 3/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv 2 hpvdd o cpvdd a positive side voltage output pin for the headphones driver. a capacitor is connected between hpvdd and cpgnd. please connect as close as possible to the chip. cpgnd (note 2) 4 hpvss o cpvdd a negative side voltage output pin for the headphones driver. a capacitor is connected between hpvss and cpgnd. please connect as close as possible to the chip. cpgnd (note 2) 22 mclki i hvdd master clock pin (input) hgnd1 21 tsto o hvdd output pin for te st-mode. make it open. hgnd1 open 20 resetb i hvdd reset pin "l" level: reset enables. "h" level: reset disable. (input) - 24 sdata /sda io hvdd 3 wire interface: data input output pin it is indicated as sdata. 2 wire interface: data input output pin (note 1) it is indicated as sda. (input) - 25 sclk /sad i hvdd 3 wire interface: serial clock input pin it is indicated as sclk. 2 wire interface: slave address select input pin. it is indicated as sad. sad pin = "l" level slave address is "0011010" sad pin = "h" level slave address is "0011011" (input) hgnd1 23 csb /scl i hvdd 3 wire interface: chip select input pin it is indicated as csb. 2 wire interface: serial clock input pin *1 it is indicated as scl. (input) - 26 sai_lrclk io hvdd sai lr clock input/output pin (input) hgnd1 27 sai_bclk io hvdd sai bit cl ock input/output pin (input) hgnd1 28 sai_sdin i hvdd sai seri al data input pin (input) hgnd1 29 sai_sdout o hvdd sai seri al data output pin hgnd1 open 30 irqb o hvdd an interrupt output terminal. when an interrupt occurs, chip outputs "l". hgnd1 open 10 vmid o regout analog reference voltage pin a capacitor is connected between vmid and hgnd2. hgnd2 - 11 mbiascap o hvdd microphone bias voltage output pin a capacitor is connected between hgnd2. please connect as close as possible to the chip. hgnd2 open 12 min1 i regout analog microphone input 1 single-end and differential can be chosen. when differential is chosen, it connects with microphone + pin. hi-z open 13 min2 i regout analog microphone input 2 single-end and differential can be chosen. when differential is chosen, it connects with microphone - pin. hi-z open 8 spout- o spvdd speaker output - pin spgnd open 7 spout+ o spvdd speaker output + pin spgnd open 1 hpl o spvdd headphones output lch terminal cpgnd open 40 hpr o spvdd headphones output rch terminal cpgnd open 39 cpp o cpvdd charge pump flying capacit or, positive side output pin hi-z open 5 cpn o cpvdd charge pump flying capac itor, negative side out put pin hi-z open 19 pllc o hvdd pll filter pin when clock of the mclki pin input is used, make it open. when clock of the sai_bclk pin input is used, it is necessary to connect resistors and a capacitor. hgnd2 open 31 yp o tvdd yp pin for the touch panel interface hi-z open 32 xp o tvdd xp pin for the touch panel interface hi-z open 33 xn o tvdd xn pin for the touch panel interface hi-z open 34 yn o tvdd yn pin for the touch panel interface hi-z open 37 hpcom i - headphones amplifier common pin (input) - (note 1) in case of 2 wire serial, if th is pin is used with external pull-up resist or, it possibly gets noise from power. ther efore, tamper noise design is required in the noisy environment. (note 2) at the time of power down, in hpvdd and hpvss, is short-circuited. downloaded from: http:///
datasheet d a t a s h e e t 4/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv description of block(s) figure 3. bu26154 application circuit spout+ spout- mclki sai_sdout sai_sdin sai_bclk sai_lrclk sdata/sda sclk csb/scl resetb hvdd hgnd2 vmid hpl tsto hpr mbiascap cpp cpn xp xn yp yn tvdd min1 hpvss tgnd regout cpgnd pllc irqb cpvdd hpvdd spvdd spgnd cpu and dsp touch screen bu26154 min2 hpcom hgnd1 open 1 f 2.2 f 2.2 f 1 f 2.2 f 2.2kohm 4.7 f 1 f 1 f 1 f 1 f option option option option 0.47 f 0.47 f downloaded from: http:///
datasheet d a t a s h e e t 5/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv absolute maximum ratings (ta = 25c) (hgnd1=hgnd2=spg nd=cpgnd=tgnd=0v) parameter symbol condition rating unit hvdd supply voltage hvdd - -0.3 to 4.5 v spvdd supply voltage spvdd - -0.3 to 7.0 v cpvdd supply voltage cpvdd - -0.3 to 4.5 v input voltage vin mclki, sai_lrclk, sai_bclk, sai_sdin, sdata/sda, sclk. csb/scl pins -0.3 to hvdd+0.3 v min1, min2 pins -0.3 to regout+0.3 v storage temperature t stg - -55 to +150 power dissipation (note 1) pd ta=25c (note 1) 0.80 w ta=25c (note 2) 3.01 w output current 1 iosp spout+, spout- pins -560 to +560 ma output current 2 iohp hpl, hpr pins -100 to +100 ma output current 3 iocp hpvss,hpvdd,cp,cn pin -500 to +500 ma output current 4 iorego regout pin -30 to 0 ma output current 5 ioo except spout+,spout-, hpl,hpr, regout,hpvdd,hpvss pins -8 to +8 ma do not short the output pin to another output pin, power supply pin or gnd pin.(output pin includes an io pin which is in outpu t mode) (note 1) 74.2mm74.2mm1.6tmm fr4 1layer glass epoxy base surface copper foil 0% mounting above ta=25 ,reduced by 8.0mw/ . thermal beer is on a base. (note 2) 74.2mm74.2mm1.6tmm fr4. 4 layer glass epoxy base 2,3layer copper foil 100% mounting above ta=25 , reduced by 30.12mw/ . thermal beer is on a base. caution: operating the ic over the absolute maximum ratings may damage the ic. the damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. therefore, it is important to consider circuit protection measures, such as adding a f use, in case the ic is operated over the absolute maximum ratings. recommended operating conditions (hgnd1=hgnd2=spg nd=cpgnd=tgnd=0v) parameter symbol condition rating unit hvdd supply voltage hvdd hvdd=cpvdd=tvdd 2.7 to 3.6 v spvdd supply voltage spvdd - 2.7 to 5.5 v cpvdd supply voltage cpvdd hvdd=cpvdd=tvdd 2.7 to 3.6 v tvdd supply voltage tvdd hvdd=cpvdd=tvdd 2.7 to 3.6 v operating temperature t op - -20 to +85 (note 1) the radiation-proof design is not carried out. downloaded from: http:///
datasheet d a t a s h e e t 6/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv electrical characteristics dc characteristics (hgnd1= hgnd2=spgnd=cpgnd=tgnd =0v, hvdd=3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v, ta=25 ) parameter symbol conditions min typ max unit related pin "h" input voltage1 vih1 hgnd1=0v hvdd *0.8 - hvdd+0.3 v all digital input "l" input voltage 1 vil1 hgnd1=0v -0.3 - hvdd *0.2 v all digital input "h" input voltage 2 vih2 hg nd1=0v hvdd-0.4 - hvdd+0.3 v all digital input "l" input voltage 2 vil2 hgnd1=0v -0.3 - 0.4 v all digital input "h" output voltage voh ioh=-1ma hvdd *0.85 - - v except sda "l" output voltage 1 vol1 iol=1ma - - hvdd *0.15 v except sda "l" output voltage 2 vol2 iol=3ma - - 0.4 v sda "h" input leakage current iih vih= hvdd - - 10 a all digital input "l" input leakage current iil vil=hgnd1 -10 - - a all digital input "z" output leakage current iozh voh=hvdd - - 10 a sda "z" output leakage current iozl vol=hgnd1 -10 - - a sda operating current1 iddo1 playback(fs48khz) no load, hp-amp use sin1khz-full scale output - 10 13 ma - operating current2 iddo2 playback(fs48khz) no load, d-class, sp-amp use sin1khz-full scale output - 10.5 13.7 ma - operating current3 iddo3 playback(fs48khz) no load, ab-class, sp-amp use sin1khz-full scale output - 12 15.6 ma - operating current4 iddo4 record(fs48khz) sin1khz-full scale input - 9.5 12.4 ma - operating current5 iddo5 touch panel interface operate - 0.6 1 ma - operating current6 (note 3) iddo6 touch panel interface interrupt wait ta = -40 to 55 - 220 320 ua - standby current idds 25 - 0.5 5 a - (note 1) touch panel interface interrupt elec tric current at the time of the wait. please refer to a touch panel interface clau se for the movement setting condition. (note 2) standby current is total value for all power supply currents. (note 3) standby current's condition is power off state by resetb=l downloaded from: http:///
datasheet d a t a s h e e t 7/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv ac characteristics clock pll not used (hgnd1= hgnd2=spgnd=cpgnd=tgnd =0v, hvdd=3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v, ta=25 ) parameter symbol min max unit mclki frequency fc 4.096 49.152 mhz mclki period tc 1/fc 1/fc ns mclki h length tch tc*0.4 - ns mclki l length tcl tc*0.4 - ns pll used (hgnd1= hgnd2=spgnd=cpgnd=tgnd =0v, hvdd=3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v,ta=25 ) parameter symbol min max unit mclki frequency fc 6.75 54 mhz mclki period tc 1/fc 1/fc ns mclki h length tch tc*0.4 - ns mclki l length tcl tc*0.4 - ns when pll is use, clock from sai_bclk pin other than mclki pin could be inputted. please refer to sai slave clause about the bclk pin input frequency. figure 4 reset (hgnd1= hgnd2=spgnd=cpgnd=tg nd=0v, hvdd=3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v, ta=25 ) parameter symbol min max. unit resetb pulse width tw_rst 5 - s figure 5 when reset pin is made low-level, internal ldo goes to power mode. 1ms is necessary until regout pin becomes low-level. the recommended tw_rst is over 1ms. mclki tc, fc tch tcl resetb tw_rst downloaded from: http:///
datasheet d a t a s h e e t 8/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv 2-wire serial interface (hgnd1= hgnd2=spgnd=cpgnd=tg nd=0v, hvdd=3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v, ta=25 , cl=30pf) parameter symbol standard mode fast mode unit min max min max scl frequency f scl - 100 - 400 khz scl "l" length t low 4.7 - 1.3 - s scl "h" length t high 4.0 - 0.6 - s hold time under repeat [start] condition t hd:sta 4.0 - 0.6 - s setup time under repeat [start] condition t su:sta 4.0 - 0.6 - s data hold time t hd:dat 0 3.45 0 0.9 s data setup time t su:dat 250 - 100 - ns setup time under [stop] condition t su:sto 4.0 - 0.6 - s figure 6 sda thd:sta thd:dat tlow thigh tsu:dat tsu:sto tsu:sta scl thd:sta downloaded from: http:///
datasheet d a t a s h e e t 9/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv 3-wire serial interface (hgnd1= hgnd2=spgnd=cpgnd=tgnd=0v, hvdd= 3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v, ta = 2 5 , cl=30pf) parameter symbol min max unit sclk low to chip select enable tslcl 100 - ns chip select enable to sclk low tclsl 100 - ns chip select enable to sclk high tclsh 100 - ns clk high to chip select enable tshcl 100 - ns sclk high pulse width tsh 50 - ns sclk low pulse width tsl 50 - ns input data setup time tids 30 - ns input data hold time tidh 30 - ns sclk last edge to chip select disable tchs2 100 - ns chip select high pulse width tch 100 - ns output data valid todv - 40 ns chip select high to data transition tchdts - 40 ns two kinds of timing are supported depending on the sclk pin leve l at data transfer start. read or write is selected by lsb logic index. figure 7 downloaded from: http:///
datasheet d a t a s h e e t 10/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv serial audio interface (slave) (hgnd1= hgnd2=spgnd=cpgnd=tgnd=0v, hvdd= 3.3v, spvdd=3.3v, cpvdd=3.3v, vdd=3.3v, ta = 2 5 , cl=30pf) parameter symbol min max unit sai_bclk period tc_bclk 32fs 128fs hz sai_bclk "h" length thw_bclk 73 - ns sai_bclk "l" length tlw_bclk 73 - ns sai_lrclk hold time th_lrclk 20 - ns sai_lrclk setup time tsu_lrclk 20 - ns sai_sdout delay time td_sdo (note 1) - 80 ns sai_sdin setup time tsu_sdi 20 - ns sai_sdin hold time th_sdi 20 - ns (note 1) td_sdo is the delay time from previous sai_bclk transition and sai_lrclk transition. sai transmit figure 8 sai receive figure 9 sai_lrclk sai_bclk sai_sdout tc_bclk tsu_lrclk th_lrclk td_sdo thw_bclk tlw_bclk sai_lrclk sai_bclk sai_sdin tc_bclk tsu_lrclk th_lrclk tsu_sdi th_sdi thw_bclk tlw_bclk downloaded from: http:///
datasheet d a t a s h e e t 11/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv sai (master) - serial audio interface (master) (hgnd1= hgnd2=spgnd=cpgnd=tgnd=0v, hvdd= 3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v, ta = 2 5 , cl=30pf) parameter symbol min max unit sai_bclk period tc_bclk 32fs 64fs hz sai_bclk "h" length thw_bclk 146 - ns sai_bclk "l" length tlw_bclk 146 - ns sai_lrclk delay time td_lrclk - 20 ns sai_sdout delay time td_sdo - 20 ns sai_sdin setup time tsu_sdi 50 - ns sai_sdin hold time th_sdi 0 - ns sai transmit figure 10 sai receive figure 11 sai_bclk sai_sdout tc_bclk td_lrclk td_sdo thw_bclk tlw_bclk sai_lrclk sai_lrclk sai_bclk sai_sdin tc_bclk td_lrclk tsu_sdi th_sdi thw_bclk tlw_bclk downloaded from: http:///
datasheet d a t a s h e e t 12/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv power supply sequence please power on/off the lsi with all kind of power at the same time. each power supply should power up/down in 50ms. also, k eep all power supply in the on state or the off state. please avoid partial on or partial off states. please keep resetb pin l level until all power supply become on state. the cpu i/f become available when all power supply is powered on after t w_purst and t w_regu time exceeds. hvdd must be powered on first, but hvdd must be powered off last. about spvdd, there is no limitation above. parameter symbol min typ max unit power on delay time t vdd_on 0 - 50 ms power off delay time t vdd_off 0 - 50 ms reset time after power on t w_purst 1 - - s wait time for regulator starting after reset release t w_regu 1 - - ms figure 12 h vdd power supply t vdd_on powersupply*0.9 powersupply*0.9 t vdd_off not available available not available cpu i/f resetb other power su pp l y vdd off op eration vdd off status powerdown wait regulato r t w _ regu powersupply*0.1 powersupply*0.1 regout t w _ purst downloaded from: http:///
datasheet d a t a s h e e t 13/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv analog characteristics (hgnd1= hgnd2=spgnd=cpgnd=tgnd=0 v, hvdd=3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v, ta=25c) paramete r symbol condition min typ max unit regulator output regout output level vregout - 1.7 1.8 1.9 v mic input (mic gain=18db / digital volume=0.0db / alc=off) full scale input signal level vminfs1 min1,min2 -- 0.124 vp-p input resistance rmin1 min1,min2 20 30 40 k ? mic input (mic gain=9.0db / digital volume=0.0db / alc=off) full scale input signal level vminfs2 min1,min2 -- 0.454 vp-p input resistance rmin2 min1,min2 20 30 40 k ? analog reference level(vmid-pin) analog reference voltage vref - 0.9x regout/2 1.0x regout/2 1.1x regout/2 v microphone bias(mbiascap -pin) output voltage where, vmic datasheet d a t a s h e e t 14/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv (hgnd1=hgnd2=spgnd=cpgnd=tgnd= 0v, hvdd=3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v, ta=25 ) paramete r symbol conditions min typ max unit analog inputs to adc out (mic gain=18db / digital volume=0.0db / alc=off) s/(n+d) snd1 -1dbfs/ a-weighted - 78 - db s/n snr1 a-weighted - 89 - db power supply rejection ratio psrr1 hvdd on 100mvp-p, 1khz noise, no signal input - 90 - db analog inputs to adc out (mic gain=9.0db / digital volume=0.0db / alc=off) s/(n+d) snd2 -1dbfs/ a-weighted - 80 - db s/n snr2 a-weighted - 92 - db power supply rejection ratio psrr2 hvdd on 100mvp-p, 1khz noise, no signal input - 90 - db dac to headphone out(hpr/hpl, with 16 ? /50pf load) total harmonic distortion thd+n3 1khz,input -12dbfs - 75 - db signal to noise ratio snr3 a-weighted - 93 - db power supply rejection ratio psrr3 hvdd on 100mvp-p,1khz noise, no signal input - 90 - db cpvdd on 100mvp-p,1khz noise, no signal input - 90 - db output offset voltage vof no signal input - 1 - mv charge pump oscillator frequency cposc - - 500 - khz hpvdd port output voltage hpvdo - - 1.8 - v hpvss port output voltage hpvso - - -1.8 - v dac to speaker out d-class mode (spout+/-, with 8 ? /50pf load) output power po4 thd=10%, spvol=6db - 700 - mw total harmonic distortion thd+n4 po=310mw - 66 - db signal to noise ratio snr4 a-weighted, thd+n=1% - 95 - db power supply rejection ratio psrr4 hvdd on 100mvp-p,1khz noise - 90 - db spvdd on 100mvp-p,1khz noise - 60 - db pwm frequency pwmf - - 370 - khz efficiency eff - - 90 - % dac to speaker out ab-class mode (spout+/-, with 8 ? /50pf load) output power po5 thd=10%, spvol=6db - 700 - mw total harmonic distortion thd+n5 po=310mw - 62 - db signal to noise ratio snr5 a-weighted, thd+n=1% - 95 - db power supply rejection ratio psrr5 hvdd on 100mvp-p,1khz noise - 90 - db spvdd on 100mvp-p,1khz noise - 60 - db microphone bias(mbiascap-pin) *1 output noise voltage vmicn6 22hz to 22khz, micbcon=1 - 5 - v power supply rejection ratio psrr6 hvdd on 100mvp-p,1khz noise load=1ma micbcon=1 - 70 - db downloaded from: http:///
datasheet d a t a s h e e t 15/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv (hgnd1=hgnd2=spgnd=cpg nd=tgnd=0v, hvdd=3.3v, spvdd=3.3v, cpvdd=3.3v, tvdd=3.3v,ta=25 ) paramete r symbol conditions min typ max unit touch panel interface adc resolution n - - - 12 bit differential non-linearity error dnl - -3 - 3 lsb integral non-linearity error inl - -4 - 4 lsb offset error ofterr - - 1 - lsb gain error gaerr - - 0.5 - lsb touch panel driver switch swonr - - 5 - ? interrupt pull-up resistance irqr1 rsel=0 40 50 70 k ? irqr2 rsel=1 70 90 120 k ? adc conversion timing tw_adc1 - - 35 s tw_adc2 - - 43 s downloaded from: http:///
datasheet d a t a s h e e t 16/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv function description clock control main modules that make sound path of the lsi inside operate with 1024fs audio clock. audio clock can be selected whether divided clock of 256fs/512fs/ 1024fs from mclki or generated clock from audio pll. when pll is used, pll generates internal clock. the input clock into pll can be selected from either mclki port or sai_bclk port by setting clock input / output control re gister. pll generates 256fs clock of sampling frequency. the registers about audio clock setting: sampling rate setting register, fpllm, fpllnl, fpllnh, fplld, fpllfl, fpllfh, fpllfdl, fpllfdh, clock input / output c ontrol register, clock input select register ? the sequence of pll setting 1. stop pll output by setting plloe bit to 0. 2. disable pll by setting pllen bit to 0. 3. set pfllm, fppnl, fpllnh, fplld, fpllfl, fpllfh, fpllfdl, fpllfdh. 4. set input port by pllisel bit. 5. set pllen bit to 1. 6. wait for the pll stabilizing time as the table pll stabilizing time. 7. set plloe bit to 1. 8. start recording or playback. pll stabilizing time pll stability time 10msec - related register sampling rate setting register pllnl, pllnh register pllml, pllmh register plldiv register clock enable register clock input / output control register downloaded from: http:///
datasheet d a t a s h e e t 17/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv when pll is used. the lsi support audio pll function that can generate precise audi o clock from wide range of clock frequency. then, it can be realize audio function without external clock gener ator for audio. the lsi supports following cases. the lsi generates audio clock with input clock provided from mclki port or bclki port. case1: pllisel (0x0e/0x0f)= 0x1, mst(0x64/0x65)="0" audio clock is generated by the pll bu26154 with mclki clock. sai_lrclk and sai_bclk are provided by the cpu. sai_lrclk sai_bclk sai_sdin sai_sdout b26154 cpu mclki clock figure 13 case2: pllisel (0x0e/0x0f)= 0x1, mst(0x64/0x65)="1" audio clock is generated by the pll in bu26154 from mclk i clock. sai_lrclk and sai_bclk are provided from the lsi. figure 14 case3: pllisel (0x0e/0x0f)= 0x2, mst(0x64/0x65)="1" audio clock is generated by pll in bu26154 form sai clock. figure 15 downloaded from: http:///
datasheet d a t a s h e e t 18/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv when pll is not used. audio clock is generated by the cpu and supplied to the lsi when pll is not used. then cpu and the lsi are synchronized. case 5: mst (0x64/0x65) ="0" audio clock (256fs, 512fs, 1024fs) is g enerated by the cpu and supplied to mclki port of the lsi. lrclk and bclk are also provided from the cpu. figure 16 case6: mst (0x64/0x65)="1" audio clock (256fs, 512fs, 1024fs) is generated by the cpu and supplied to mclki port of the lsi. sai_lrclk and sai_bclk are provided from the lsi. figure 17 even when using the same sampling frequency, the setti ng condition is different depending on clock frequency. when changing mclki input frequency, plloe should be set to 0, then plloe should be set to 1 back. downloaded from: http:///
datasheet d a t a s h e e t 19/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv sai (serial audio system interface) the lsi supports sai formats. wsli="0", dlyi="0", fmti="0" figure 18 wsli="1", dlyi="0", fmti="0" figure 19 wsli="0", dlyi="1", fmti="0" figure 20 wsli="1", dlyi="1", fmti="0" figure 21 left msb 2sb 3sb l s b right 1 2 3 16 1 2 3 16 left msb 2sb 3sb l s b msb 2sb 3sb sai_ lrclk sai_sdin sai_sdout sai_bclk right 1 2 3 16 1 2 3 16 left left msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb sai_ lrclk sai_sdin sai_sdout sai_bclk 1 2 3 16 1 2 3 16 left left right sai_ lrclk sai_sdin sai_sdout sai_bclk msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb 1 2 3 16 1 2 3 16 left right left msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb sai_ lrclk sai_sdin sai_sdout sai_bclk downloaded from: http:///
datasheet d a t a s h e e t 20/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv dlyi="0", fmti="1" flame synchronous transfer mode: r channel data is transferred right after l channel data. figure 22 dlyi="1", fmti="1" flame synchronous transfer mode: r channel data is transferred right after l channel data. figure 23 - related register sai transmitter control register sai receiver control register right 1 2 3 16 1 2 3 16 left left msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb sai_ lrclk sai_sdin sai_sdout sai_bclk 1 2 3 16 1 2 3 16 left right left sai_ lrclk sai_sdin sai_sdout sai_bclk msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb downloaded from: http:///
datasheet d a t a s h e e t 21/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv 2 wire serial interface this lsi has 2 wire serial interfaces. the lsi operates as a slave device. the address is fixed at 0011010. - format the followings are the protocol of the lsi. write (msb first) start condition (set sda level from h to l during scl=h) slave address (0011010) +w (0) (8bit) write address (8bit) write data (8bit) stop condition (set sda level from l to h during scl=h) read (msb first) start condition slave address (0011010) +w (0) (8bit) read address (8bit) (stop condition) start condition slave address (0011010) +r (1) (8bit) read data (8bit) the following shows the wave form of the lsi. the yellow gridding shows that slave device drives the bus. the symbol in the wave form means as following table. unit description w/r 0: it is read write 1 a 0: ack(acknowledge) 1: nak(not acknowledge) a[7-0] address (8bit) d[7-0] data(8bit) write a scl st ar t sda 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 conti nued f rom the above 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 8 1 2 3 4 5 6 7 st op 0 sl ave address recept ion a ccess address recept ion write data reception write data reception write data reception writ e data recept ion 0 w a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 a d7 d6 d5 d4 d3 d2 d1 d0 0 1 1 0 0 1 a a a a a internal write d7 d6 d5 d4 d3 d 2 d1 d0 d7 d6 d5 d4 d3 d 2 d1 d0 d7 d6 d5 d4 d3 d 2 d1 d0 internal write internal write figure 24 in case there is no stop or start condition after internal regi ster is written (above figure: internal write), the slave device becomes continuous write mode and the next received 8 bits of data will be written into the internal register addressed by incremented by two to the current address. downloaded from: http:///
datasheet d a t a s h e e t 22/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv read s tar t scl sda 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 sta r t a internal read 1 2 3 4 5 6 7 8 0 slave address reception a ccess address reception slave address reception read data transmission read data transmission s r 0 w a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 a a a 0 1 1 0 0 0 1 1 continued fr om the above 0 1 0 1 0 a d7 d6 d5 d 4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 internal read figure 25 if the master device returns ack (acknowledge) after the 8 bit data transferred from the lsi becomes continuous read mode. the next received 8 bits of data will be read from th e internal register addressed by incremented by two to the current address. downloaded from: http:///
datasheet d a t a s h e e t 23/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv state transition about sound control the following shows state transition about sound control. a change state is carried out by recplay bit setup. figure 26 (1) sound stop state (recplay=0x0) sound activity is stopped. (2) rec state (recplay =0x1) recording is enabled through microphone. (3) play state (recplay =0x2) playback is enabled from sai. (4) monitor state (recplay =0x7) monitoring recording via microphone is enabled. alc function is only effective in recording path. only 2ch sound effects are available in notch filter mode. in the time of transition rec state to monitor state, please set off the register bits of eq2en-eq3en. (5) rec and play state (recplay =0x3) playback is enabled from sai with recording via microphone. alc function is only effective in recording path. only 2ch sound effects are available in notch filter mode. in the time of transition rec state to monitor state, please set off the register bits of eq2en-eq3en. sound stop state 0x0 rec state 0x1 play state 0x2 rec and play state 0x3 monitor state 0x7 downloaded from: http:///
datasheet d a t a s h e e t 24/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv signal flow it uses signal flow case1 or case2 at the time of recording (analog microphone). case1: rec datt filter adc digital interface dv mute alc a mic vo l rec alcvol recording noise gate rec lpf hpf2 hpf1 filter block case2: rec datt filter adc digital interface dv mute alc a mi c vol rec alcvol recording noise gate rec lpf hpf2 hpf1 filter block figure 27 name function related register setting amicvol analog microphone volume mic input volume control volume setting 9db to +35.25db hpf1 high path filter for record dc cut dsp filter function enable hpf enable/disable hpf2 high pass filter for record dsp filter function enable hpf enable/disable order setting high pass filter2 cut-off control cut-off frequency setting filter notch filter is available sound effect mode sound effect mode setting dsp filter function enable each filters enable/disable setting eq band n gain setting each filters gain setting programmable eq band n coeffeicient-a0/1 each sound effects characteristics setting reclpf low pass filter for recording. rec programmable lpf setting lpf enable/disable setting order setting rec programmable lpf cutoff coef cut-off frequency setting rec alcvol alc use:alc controls volume alc not use: its available as boost volume refer to application note alc auto level controller function. alc is processed to recording data noise gate the purpose is for reducing a floor noise recdatt record digital attenuator. its available fader function for reducing a pop-noise when changing volume. record digital attenuator control record digital attenuator control digital volume control function enable digital volume control function enable mixer & volume control mixer & volume control dvmute record digital volume mute digital volume control function enable digital volume control function enable * please refer to the sound effect mode regi ster for filter block. when filter block is connected wi th the reproduction route, nothing is processed in the recording route. downloaded from: http:///
datasheet d a t a s h e e t 25/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv signal flow at the time of the reproduction lrm con play alcvol play datt filter effect vol digital interface dac alc dv mute playback spvol play lpf filter block soft clip avol avol vol to speaker ampifier to headphone ampifier hpf2 h-bass hpinsel avol spinsel figure 28 name function related register setting lrmcon mixer of the lch/rch data input from sai. mixer & volume control mixer setting effect vol it is digital before the sound is processed volume. playback effect volume volume setting -71.5db to 0db (0.5dbstep) p 2 bass+ block for p 2 bass + processing. p 2 bass+ enable p 2 bass+ parameter* setting of p 2 bass+ filter notch filter is available sound effect mode sound mode setting dsp filter function enable enable/disable of each filter eq band n gain setting gain setting of each filter programmable eq band n coeffeicient-a0/1 characteristic setting of each filter and acoustic treatment playlpf it is programmable lpf for the reproduction. play programmable lpf setting degree setting of lpf for enable/disable reproduction of lpf for reproduction play programmable lpf cutoff coef characteristic setting of lpf for reproduction play alcvol when alc is used it functions as volume that alc controls. when alc unused: it functions as boost volume. please refer to the application note for the alc function. alc it is an auto level controller. alc is processed to the reproduction data. playdatt digital attenuator of the reproduction route. fader can be used for the noise reduction at the volume setting change. playback digital attenuator control volume setting -71.5db to 0db (0.5dbstep) digital volume control function enable fader on/off setting (synchronize with dvmute.) mixer & volume control setting at fade time (synchronize with dvmute.) dvmute reproduction route (playdatt) is compulsorily put into the state of mute. the value of playdatt need not be changed. digital volume control function enable mute on/ turning off setting spvol the analog boost volume of speaker amplifier setting. speaker amplifier input control volume setting 0db/6db/12db/18db avol the analog volume of reproduction route setting. fader can be used for the pop-noise reduction at the volume setting change. analog volume control volume setting -28db to +18db*at btl amplifier volume fader control fader on/off setting (synchronize with avmute.) amplifier volume control function enable setting at fade time (synchronize with avmute.) avmute reproduction route (spvol) is compulsorily put into the state of mute. the value of spvol need not be changed. amplifier volume control function enable mute on/off setting spinsel it selects the input path to speaker amplifier. speaker amplifier input control selection of speaker amplifier playback path hpinsel it selects the input path to headphone amplifier. headphone amplifier input control selection of headphone amplifier playback path * please refer to sound effect mode register for filter block. wh en filter block is connected with the recording route, nothing is processed in the reproduction route. downloaded from: http:///
datasheet d a t a s h e e t 26/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv filter (5bands-programmable iir filter) a five bands equalizer features a second-order iir type band pass filter. volume control of mute, -71.5db to +12db (0.5db step) can be controlled at all paths. each channels of the filter can be selected parallel connection or serial connection the followings are block diagrams at parallel connection and serial connection parallel connection serial connection figure 29 figure 30 the filter coefficient is programmable. from required center frequency and band width, programmable equalizer coefficient-a0 control register and programmable notch filter coefficient-a1 control register value is decided. followings are the setting formula. a0 = (1 - tan f b /fs) / (1 + tan f b /fs) a1 = - 2cos2 f 0 /fs / (1 + tan f b /fs) f0: band center frequency [hz] fb: -3db band width [hz] fs: sampling frequency [hz] * actual setting value is an integral number that the result of above formula multiplied by 2 14 then round up numbers of five and above and round down anything under five to a integer. dsp filtering function: on / off dsp filter function enable register can set on or off of each filter function. pleas e change this register when recplay bit is 0x0. if this register is changed on playback or recording, the noise may be generated. alc auto level control please refer the application note autolevelcontrolapplicationnote. band0-iir input output coefficient(a0, a1) x 5ch gain x 5ch band1-iir band3-iir band2-iir band4-iir input output coefficient(a0, a1) x 5ch gain x 5ch band0-iir band1-iir band2-iir band4-iir band2-iir downloaded from: http:///
datasheet d a t a s h e e t 27/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv p 2 bass+ (perfect pure bass plus) please refer the application note. soft clip limiter soft clip function is reduced power comsumption. if alc cannot be responded to input waveform, soft clip function is reduced input waveform. in case of input waveform is overed threshold level, soft clip reduce output waveform. out in 0x000000 0xffffff scgain=1 scgain=2 scgain=1/2 scgain=1/4 scgain=1/64 soft clip threshold (scthrh, schtrm, schtrl) soft clip gain (scgain) out in 0x000000 0xffffff scgain=1 scgain=2 scgain=1/2 scgain=1/4 scgain=1/64 soft clip threshold (scthrh, schtrm, schtrl) soft clip gain (scgain) figure 31 downloaded from: http:///
datasheet d a t a s h e e t 28/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv low power consumption operation when pcm data is inputted into lsi consec utive "0" is detected, it will disable the output amplifier automatically and perform low power consumption mode operation by stopping the internal clock. when data except 0 are inputted, it w ill automatically return to original movement. when "0" is detected in both lchrch, this function is effect ive. when you use only lch, please input "0" data into the rch side. when you use only rch, please input "0" data into the lch side. this function is effective only at the time of t he playback of the speaker amplifier. at the time of headphones amplifier playback and the recording, please set it to disable. in addition, set the enable function and "0" count level in zero detection setting register. figure 32 change of the sp/hp playback when it changes of speaker amplifier and headphone amplifier, it prepares for coefsel bit because it does not perform the re-setting of filter coefficients. a side register is used when coefsel bit is "0". b side register is used when coefsel bit is "1". the target registers are as follows. please be careful in setting addresses. a side register b side register register map index(r) map index(r) - 2 0x24/0x26/0x28 2 0x2a/0x2c/0x2e p 2 bass+ parameter0/1/2 0 0x46 2 0x46 play hpf2 setting 0 0x4c/0x4e 2 0x4c/0x4e play programmable hpf2l/h coef 0 0x5c 2 0x5c sound effect mode 0 0x66 2 0x66 dsp filter function enable 0 0x70 2 0x70 playback effect volume control 0 0x3e 2 0x73 playback digital attenuator control 0 0x74 to 0x7c 2 0x74 to 0x7c eq band0/1/2/3/4 gain setting 0 0x80 to 0xa6 2 0x7e to 0xa4 programmable equalizer band0/1/2/3/4 coefficient-a0/a1 l/h normal operation low power operation normal operation downloaded from: http:///
datasheet d a t a s h e e t 29/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv analog block vmid is used as analog circuit reference voltage for both recording path and playback path. therefore, both case for recording and playback, vmid need to do power up. at the power up, the wait time in proportion to the capacitor valu e is needed to charge external capacitor connected with vmid pin. if recording and playback start before completion of charge, it may generate noise. the following is a sequence of recommendation. refer to the analog reference power management register for the function of vmidcon. . vmid power up/down sequence (external capacitor 1uf) power up power down 1/2 regout level vmid ( 0v ) vmidcon record or playback power down power down charge time min 5ms 0x0 0x1 0x2 0x0 min 5ms figure 33 playback path the lsi can be executed sound output from 4 paths bellow. the output can be selected by speaker amplifier output control resister and analog reference power management register. digital input (sai) dac d-class speaker amplifier digital input (sai) dac ab-class speaker amplifier digital input (sai) dac headphone amplifier analog microphone input (min pin) adc dac headphone amplifier no guaranty of record path sound quality during speaker amplifier active. speaker amplifier the speaker amplifier of bu26154 can choose operation mode am ong one of d-class operation or the ab-class operation. it can prevent interference with fm radio influence by making ab-class operation. it performs the change of the enable / disable setting of the speaker amplifier and the ab-class/d-class operation in speaker amplifier power management register. headphones amplifier the headphones amplifier of bu26154 operates in a ground reference. therefore the lsi can delete the condenser for the ac coupling to get outside. in addition, the lsi can suppre ss a pop noise when you want to suppress a pop noise by connecting the optional resistance of the chart below outside. figure 34 hpl left headpphone amplifie r bu26154 option hpr right headpphone amplifie r option downloaded from: http:///
datasheet d a t a s h e e t 30/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv in addition, it is necessary to operate ldo for headphone amplifier when operating headphones amplifier. the power up of headphones amplifier and ldo for headphone set in analog reference power management register. please power up the headphones amplifier after 1ms waiting time for ldo for headphones. at the time of the power down, please power down hpvdd after the power down of the headphones amplifier. figure 35 about hpcom pin hpcom pin is a signal ground pin of the headphones amplifier. hpvdd power up/down sequence power up hp power down hpvdd power down regout level hpvdd ( 0v ) hpvdd power down hpvdden hplen or hpren hp power down hpvdd power up power down hp power up and playback min 1ms min 0ms downloaded from: http:///
datasheet d a t a s h e e t 31/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv microphone amplifier the microphone input can support two modes, a single-end and differen tial. when using it in single-end input, it writes "0" in the mindif bit of the mic interface control register. when using differential input, it writes "1". in the case of single-end input, it can input from minp pin or minn pin. please set of the input pin in mic select control register. microphone bias the case of using microphone bias, it shows a recommended connection diagram. by all means, please connect a condenser (2.2uf at the minimum) to mbiascap outside pin. on this occasion, the lsi can improve noise characteristics by connecting the option resistance on the chart below (the optional resistance is up to 50 ? ). figure 36 in addition, according to the capacity of the outside condenser, it is necessary to wait until microphone bias is stable. in waiting time of micbias, please set the value of the mictime bit at the mic input charging time register. mbiascap micbiasamplifie r bu26154 option 2.2uf downloaded from: http:///
datasheet d a t a s h e e t 32/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv touch screen controller sar 12 bits adc is integrated into this lsi and is available as 4 lines type touch screen controller. there is the function of the x-axis, the position sensing of the y-axis, the pen pressure detection and the pen interrupt detection. it becomes independent to codec and is controllable without minding timing. but the hard reset (reset signal input by resetb pin) communizes it. clock control when enabled clock is to be used for touch screen controller, set tclken bit of clock enable register to "1". the touch screen controller function uses a built-in osc illator. therefore it is not necessary to perform clock control listing in item clock control when using only the touch screen controller. position sensing this lsi is available for the position sensing of the touch screen. the twice measurement of the x-axis measurement, the y-axis measurement is necessary for position sensing. bu26154 refp ainp ainn refn yp xp yn xn x- plate y -plate bu26154 refp ainp ainn refn yp xp ynxn x-plate y-plate at the time of the x-axis plate measurement at the time of the y-axis plate measurement figure 37 the pen pressure detection the measurement of touch pressure is carried out to measure the resistance between x plate and y plate. it is calculable by two methods, from the location information by location determination, and the measurement result in touch pressure measurement mode. in case of x-position and y-position are known touch pressure resistance = x-plate resistance*(x-position/4096)*[(4096/z1)-1] - y-plate resistance*[1-(y-position/4096)] in case of x-position is known touch pressure resistance = x-plate resistance*(x-position/4096)*[(z2/z1)-1] bu26154 refp ainp ainn refn yp xp yn xn x-plate y-plate bu26154 refp ainp ainn refn yp xp ynxn x-plate y-plate at the time of z1 point measurement at the time of z2 point measurement figure 38 downloaded from: http:///
datasheet d a t a s h e e t 33/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv the pen interrupt detection touch detect function outputs the x-plate and y-plate contact fr om irqb pin. please refer to description of registers for valid or invalid setup of touch detection. when x-plate and y-plate do not contact, h level is outputted from irqb pin by internal pull-up resister (typical 10kohm). when x-plate and y-plate contact, l level is outputted from irqb pin by touch plate resistance (about hundreds ohm). please refer to description of registers for irqb output selection. touch detect schematic diagram is shown below. bu26154 yp xp ynxn x-plate y-plate irq b typ.50koh m interrupt detect circuit figure 39 irqb pin outputs "l" during resetb "l"(reset state) period. during this period, please mask interrupt. interrupt timing figure 40 resetb irqb valid min: 1ms downloaded from: http:///
datasheet d a t a s h e e t 34/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv about touch panel interface at interrupt wait touch panel interface can switch to low power consumption by stopping the operation of unnecessary circuits at interr upt wait. setting of touch panel interface at interrupt wait 0x2d = 0x00, // thermal detect circuit disable 0x1d = 0x02, // mapcon=2 0x05 = 0x22, // level shifter for headphone off 0x13 = 0x00, // reference current circuit for audio system off 0x1d = 0x00, // mapcon=0 0x0d = 0x80, // touch panel interface oscillation circuit enable 0x1d = 0x01, // mapcon=1 0x61 = 0x38, // touch panel interface interrupt circuit enable 0x1d = 0x00, // mapcon=0 0x0d = 0x00, // touch panel interface oscillation circuit disable this state is interrupt wait mode. please use a touch panel interface after interrupt, setting enable oscillation circuit. please, set circuit from disable to enable in circuit when using of audio system function setting at using of audio system function 0x2d = 0x01, // thermal detect circuit enable 0x1d = 0x02, // mapcon=2 0x05 = 0x26, // level shifter for headphone on 0x13 = 0x01, // reference current circuit for audio system on 0x1d = 0x00, // mapcon=0 downloaded from: http:///
datasheet d a t a s h e e t 35/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv operating mode normal operating mode it becomes normal operating mode by setting touch adc cont rol registertcha2=0x1. next ad conversion starts by reading register value of adcr1 register (8bit mode) or adcr2 register (12bit mode), at normal operating mode. t i a ai i aa i a a i a aa i =,t="" = a a a aa i_ i_ aa i_ i_ gi aa ai_ aa ai_ gi aa ai_ aa ai_ t_ t_ t_ t_ 12bit normal mode i2c timing t i a ai i aa i a a i a aa i =,t="" = a a a aa i aa i gi aa ai aa ai gi t_ t_ 8bit normal mode i2c timing ad conversion starts by rising edge of csb at using spi. 12bit timing mode chart is listed below. 8bit mode start timing is similar it. t i a ai i aa a aa =,t="" = a a a aa i_ i_ aa i_ i_ gi aa ai_ aa ai_ gi aa ai_ aa ai_ t_ t_ t_ t_ 8bit normal mode spi timing downloaded from: http:///
datasheet d a t a s h e e t 36/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv auto operation mode when tcha2 bit of touch adc control register is set to "0", bu26154muv is set to auto operation mode. when is to set in auto mode operation, bu 26154 muv is interrupt mode by reading to adcr2 register in 12 bit mode and bu 26154 muv is interrupt mode by reading to adcr1 register in 8 bit mode. t i a ai i aa i a a i a aa i =,t="" = a a a aa i_ i_ gi aa ai_ gi aa ai_ t_ t_ 12bit auto mode i2c timing t i a ai i aa i a a i a aa i =,t="" = a a a aa i_ gi aa ai_ gi t_ 8bit auto mode i2c timing t i a ai i aa a aa =,t="" = a a a aa i_ i_ gi aa ai_ gi aa ai_ t_ t_ 12bit auto mode spi timing downloaded from: http:///
datasheet d a t a s h e e t 37/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv register function explanation register map note: - indicates a reserved bit. they return 0 for read. write 0 to the bi t every time. if 1 is written to this bit, t he operations cannot be guaranteed. dont write data to empty index or register bit to guarantee normal operation. a function with (*)bit doesnt need internal clock to change state. the following registers are accessible at the time of mapcon=0x0 of the register map control register (0x1c/0x1d). downloaded from: http:///
datasheet d a t a s h e e t 38/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv b07 b06 b05 b04 b03 b02 b01 b00 register name note r w (initial) 0x00 0x01 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x1c 0x1d 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x2c 0x2d tsden thermal shutdown 1 control 0x2e 0x2f 0x30 0x31 0x3a 0x3b 0x3e 0x3f 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x58 0x59 0x5a 0x5b 0x5c 0x5d ] 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b & 0x6c 0x6d 0x70 0x71 0x72 0x73 0x74 0x75 index :] - - downloaded from: http:///
datasheet d a t a s h e e t 39/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv b07 b06 b05 b04 b03 b02 b01 b00 register name note r w (initial) 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xb2 0xb3 0xb4 0xb5 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 index downloaded from: http:///
datasheet d a t a s h e e t 40/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv b07 b06 b05 b04 b03 b02 b01 b00 register name note rw( i n i t i a l ) 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xdc 0xdd 0xe8 0xe9 index downloaded from: http:///
datasheet d a t a s h e e t 41/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv the following registers are accessible at the time of mapcon=0x1 of the register map control register (0x1c/0x1d). b07 b06 b05 b04 b03 b02 b01 b00 register name note rw( i n i t i a l ) 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f _ 0x10 0x11 _ 0x12 0x13 0x1c 0x1d 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x60 0x61 0x62 0x63 0x64 0x65 0x82 0x83 0x84 0x85 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xda 0xdb 0xde 0xdf 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe8 0xe9 index downloaded from: http:///
datasheet d a t a s h e e t 42/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv b07 b06 b05 b04 b03 b02 b01 b00 register name note rw( i n i t i a l ) 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 :] index :] :] :] downloaded from: http:///
datasheet d a t a s h e e t 43/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv the following registers are accessible at the time of mapcon=0x2 of the register map control register (0x1c/0x1d). b07 b06 b05 b04 b03 b02 b01 b00 register name note rw( i n i t i a l ) 0x00 0x01 0x04 0x05 0x12 0x13 audio analog 1c o n t r l 1 0x1c 0x1d 0x24 0x25 p2 bass+ parameter0a 00000000 0x26 0x27 - p2 bass+ parameter1a - 0000000 0x28 0x29 p2 bass+ parameter2a 00000000 0x2a 0x2b p2 bass+ parameter0b 00000000 0x2c 0x2d - p2 bass+ parameter1b - 0000000 0x2e 0x2f p2 bass+ parameter2b 00000000 0x04 0x05 0x12 0x13 audio analog 1c o n t r l 1 0x1c 0x1d 0x46 0x47 0x4c 0x4d 0x4e 0x4f 0x5c 0x5d ] 0x66 0x67 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 p2bhpf1b p2bgainbsb p2blpf2b p2bgainevb p2bgainodb :] p2blpf1a index p2bhpf1a p2bgainbsa p2blpf2a p2bgaineva p2bgainoda p2blpf1b downloaded from: http:///
datasheet d a t a s h e e t 44/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv b07 b06 b05 b04 b03 b02 b01 b00 register name note rw( i n i t i a l ) 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 index downloaded from: http:///
datasheet d a t a s h e e t 45/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv register details explanation note: - indicates a reserved bit. they return 0 for read. write 0 to the bi t every time. if 1 is written to this bit, t he operations cannot be guaranteed. dont write data to empty index or register bit to guarantee normal operation. a function with (*)bit doesnt need internal clock to change state. sampling rate setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x00 0x01 - - - - ----0000 index sr this register sets the sampling rate of the recording/playback. please perform the change of this register level in recplay=0x0) at a recording/playback stop. sr [3:0] setting explanation 0x0 8khz 0x1 11.025 khz 0x2 12khz 0x3 16khz 0x4 22.05 khz 0x5 24khz 0x6 32khz 0x7 44.1 khz 0x8 48khz clock enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 rw( i n i t i a l ) 0x0 0x0c 0x0d index this register is a register to control the operation of the clock. mclken this bit sets permission / stop of the input of the mclki terminal. the input logic of the mclki terminal becomes invalid at the time of the stop and clock is not transmitted to the lsi inside. setting explanation 0 mclki terminal input stop a clock stops at the input first grade of the terminal 1 mclki terminal input permission pllen this bit sets movement / stop of pll. setting explanation 0 pll stop 1 pll movement after setting the pll setting register, please set pllen bit to "1". plloe this bit is to set the status of pll output. set this bit to 1 after pll operation has stabilized. also, this bit must be se t to 1 if pll is not used, otherwise internal clock cannot be provided. setting explanation 0 the pll output is put under ban 1 pll output permission tclken this bit sets the clock for the touch panel interface circuit. tclken explanation 0 disable clock for the touch panel interface. 1 enable clock for the touch panel interface. downloaded from: http:///
datasheet d a t a s h e e t 46/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv clock input / output control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x0e 0x0f - - - - - - 00000 index pllisel clksel this register is to select internal clock. it is to use or not use and to create mclki input or internal clock divided pll. clksel[2:0] choose a clock to be use setting explanation 0x0 using pll lets you output 256fs clock from pll. the pll output is just used inside this lsi. 0x2 using pll lets you output 512fs clock from pll. the clock that is divided by 1/2 the pll output is used inside this lsi. 0x3 using pll lets you output 1024fs clock from pll the clock that is divided by 1/4 the pll output is used inside this lsi. 0x4 input 256fs clock to mclki terminal and pll is not used. mclki terminal input is just used in this lsi. 0x6 input 512fs clock to mclki terminal and pll is not used. the clock that is divided by ? the mclki terminal input is used inside this lsi. 0x7 input 1024fs clock than mclki terminal and use it without using pll. the clock that is divided by 1/4 the mclki terminal input is used inside this lsi. pllisel[1:0] when this bit chooses to input clock into pll and does not use pll, please set register to 0x0. setting explanation 0x0 prohibited from setting 0x1 use mclki terminal input 0x2 use bclk terminal input software reset register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 0 0 x 1 0 0 x 1 1------- s o f t r s t -------0 index this register is for software reset. cpu interface and this register are reset by writing softrst bit to 1. and then, write 0 for releasing reset. record/playback running control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x12 0x13 - - - - - -----000 index recplay this register controls start / stop of the recording/playback operation of the lsi. downloaded from: http:///
datasheet d a t a s h e e t 47/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv recplay [2:0] this bit controls start / stop of the recording/playback operation of the lsi and it is feasible by recording and reproduction at the same time and monitor recording data from the reproduction course, and please refer to "state transition item about the recording reproduction control" for the transition between recording/playback states again. transition between other states is prohibited. please move to the next movement once by all means after having let recording/playback movement make a stop (recplay=0x0). tclken explanation 0x0 sound stop state stop recording and playback. 0x1 rec state recording start. microphone input is converted from analog to digital, and transferred through sai. 0x2 play state playback start. sai received data is converted from digital to analog and output from playback path. 0x3 rec and play state. simultaneously recording and playback start. microphone input is converted from analog to digital, and transferred through sai and sai received data is converted from digital to analog and output from playback path. 0x7 monitor state. monitoring the recording sound start. microphone input is converted from analog to digital, and transferred through sai and this data is converted from digital to analog and output from playback path. mic input charging time register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x14 0x15 - - - - 000000 index mctime this register is to select the wait time for microphone input load charge. the lsi work recording signal or playback signal are mute when from recplay is changed from 0x0 until mctime. this time contains required time of initializing dsp that is 40/fs. it must be waited the setting time to start recording or playback. mctime is valid at playback. if it is necessary to start up earlier on playback, please set mctime to 0x00. it is minimum time. . mctime [5:0] setting fs conversion time (fs=48khz) 0x00 40/fs 0.8ms 0x01 128/fs 2.7ms 0x02 256/fs 5.3ms 0x03 384/fs 8.0ms 0x04 - 0x3d (128/fs / step) : 0x3e 7936/fs 165.3ms 0x3f 8064/fs 168.0ms note) the waiting time for microphone input load charge it is a recommended value of min1 coupling capacitor at the charge time. charge waiting time capacitor capacity charge waiting time (6 ) 0.1f 16ms 0.22f 36ms * charge time is proportional to capacity of capacitor. register map control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) a l l 0 x 1 c 0 x 1 d------ ------00 index mapcon downloaded from: http:///
datasheet d a t a s h e e t 48/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv mapcon this register controls register map. setting explanation 0x0 it is accessible to register map0 0x1 it is accessible to register map1 0x2 it is accessible to register map2 0x3 this is prohibited from setting analog reference power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x20 0x21 hpren hplen - - hpvdden micben 00 - - 0000 index vmidcon this register controls headphones amplifier, ldo for the charge pump, the power-up / down of the hole rch standard voltage generation circuit. vmidcon [1:0] these bits control power up and down of the vmid generation circuit. power up time can be reduced by using high speed mode. vmid generation circuit should be changed to normal mode after high speed mode. setting explanation 0x0 power down 0x1 high speed mode power up 0x2 normal mode power up micben it controls microphone bias circuit. setting explanation 0 power down 1 power up hpvdden it controls hpamp ldo for the charge pump. setting explanation 0 disables 1 enables hplen it controls hpamp. when using headphone, please set hplen/hpren to "1". setting explanation 0 disable(hpl) 1 enable(hpl) hpren it controls hpamp. when using headphones , please set hplen/hpren "1". setting explanation 0 disable(hpr) 1 enable(hpr) analog input power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 rw( i n i t i a l ) 0x22 0x23 - - pgaatt - pgaen - adcen - - -0-0-0- index this register controls the power-up / down of analog circuit. 0x0 downloaded from: http:///
datasheet d a t a s h e e t 49/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv adcen it controls power-up / down of the adc. setting explanation 0 adc power down 1 adc power up pgaen it controls the power-up / down of the microphone amplifier. setting explanation 0 microphone amplifier power down 1 microphone amplifier power up pgaatt it controls the gain of the microphone amplifier. setting explanation 0 normal mode (0db) 1 attenuation mode (-9db) dac power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x24 0x25 - - - - - dacren daclen - -----00- index this register controls power-up / down of the dac. daclen it controls the power-up / down of the dac left. setting explanation 0 power down 1 power up dacren it controls the power-up / down of the dac right. setting explanation 0 power down 1 power up speaker amplifier power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 rw( i n i t i a l ) 0x26 0x27 spmdsel - - avren coefsel - spen avlen 0- - 00100 index this register controls speaker amplifier volumes power-up / down. b02 is h fix. avlen it controls power-up / down of the lch analog volume. avlen explanation 0x0 lch analog volume power down 0x1 lch analog volume power up spen i control the power-up / down of the speaker amplifier. spen explanation 0x0 speaker amplifier power down 0x1 speaker amplifier power up 0x0 downloaded from: http:///
datasheet d a t a s h e e t 50/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv coefsel in bu26154, an a side, a b side prepare filter setting at the time of the reproduction, a volume setting register. the register value of the a side, in the case of "1", i use a register level of the b side when this bit is "0". coefsel explanation 0x0 it uses the register a side. 0x1 it uses the register b side. avren it controls power-up / down of the rch analog volume. avren explanation 0x0 rch analog volume power down 0x1 rch analog volume power up spmdsel it sets the speaker amplifier to d class or ab class. at the time of the change, set spen=0 before setting spmdsel. spmdsel explanation 0x0 set speaker amplifier to ab-class. 0x1 set speaker amplifier to d-class. thermal shutdown control register tsden it controls a thermal shut down function. setting explanation 0x0 disable 0x1 enable zero cross comparator power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 0 0 x 2 e 0 x 2 f------z c e n- ------0- index this register sets on/off of the zero cross function of the digital volume. zcen this function is effective for effect volume and rdatt setting explanation 0 disable 1 enable micbias voltage control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 0 0 x 3 0 0 x 3 1------ ------00 index micbcon this register sets the output voltage reading of the microphone bias. downloaded from: http:///
datasheet d a t a s h e e t 51/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv micbcon [1:0] these bits are to set the micbias. set the micbias voltage less than hvdd x 0.85. setting the output voltage 0x0 regout / 2 x 1.67v 0x1 regout / 2 x 2.22v 0x2 regout / 2 x 2.78v 0x3 regout / 2 x 3.33v analog volume control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x3a 0x3b - - - - - - 01010 index avvol this register sets the gain of the analog volume of lch and rch. the fader function of the amp volume control function enable register is also available. avol[5:0] avol[5:0] gain[db] avol[5:0] gain[db] 0x3fto0x1a - 0x09 -2.0 0x19 +18.0 0x08 -4.0 0x18 +17.0 0x07 -6.0 0x17 +16.0 0x06 -8.0 0x16 +15.0 0x05 -12.0 0x15 +14.0 0x04 -16.0 0x14 +13.0 0x03 -20.0 0x13 +12.0 0x02 -24.0 0x12 +11.0 0x01 -28.0 0x11 +10.0 0x00 mute 0x0f +8.0 0x0e +7.0 0x0d +6.0 0x0c +4.0 0x0b +2.0 0x0a 0.0 playback digital attenuator control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x3e 0x3f 11111111 index pdatt playback digital attenuator control register b mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x2 0x72 0x73 11111111 pdattb index pdatt[7:0]/ pdattb[7:0]/ this register sets the gain of the digital volume in the case of coefsel=0, the register level of pdatt is effective. in the case of coefsel=1, the register level of pdattb is effective. downloaded from: http:///
datasheet d a t a s h e e t 52/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv pdatt/ pdattb gain (db) pdatt [7:0] gain (db) pdatt [7:0] gain (db) pdatt [7:0] gain (db) 0x00 - to 0x6e this is prohibited from setting 0x93 -54.0 0xb8 -35.5 0xdd -17.0 0x6f mute 0x94 -53.5 0xb9 -35.0 0xde -16.5 0x70 -71.5 0x95 -53.0 0xba -34.5 0xdf -16.0 0x71 -71.0 0x96 -52.5 0xbb -34.0 0xe0 -15.5 0x72 -70.5 0x97 -52.0 0xbc -33.5 0xe1 -15.0 0x73 -70.0 0x98 -51.5 0xbd -33.0 0xe2 -14.5 0x74 -69.5 0x99 -51.0 0xbe -32.5 0xe3 -14.0 0x75 -69.0 0x9a -50.5 0xbf -32.0 0xe4 -13.5 0x76 -68.5 0x9b -50.0 0xc0 -31.5 0xe5 -13.0 0x77 -68.0 0x9c -49.5 0xc1 -31.0 0xe6 -12.5 0x78 -67.5 0x9d -49.0 0xc2 -30.5 0xe7 -12.0 0x79 -67.0 0x9e -48.5 0xc3 -30.0 0xe8 -11.5 0x7a -66.5 0x9f -48.0 0xc4 -29.5 0xe9 -11.0 0x7b -66.0 0xa0 -47.5 0xc5 -29.0 0xea -10.5 0x7c -65.5 0xa1 -47.0 0xc6 -28.5 0xeb -10.0 0x7d -65.0 0xa2 -46.5 0xc7 -28.0 0xec -9.5 0x7e -64.5 0xa3 -46.0 0xc8 -27.5 0xed -9.0 0x7f -64.0 0xa4 -45.5 0xc9 -27.0 0xee -8.5 0x80 -63.5 0xa5 -45.0 0xca -26.5 0xef -8.0 0x81 -63.0 0xa6 -44.5 0xcb -26.0 0xf0 -7.5 0x82 -62.5 0xa7 -44.0 0xcc -25.5 0xf1 -7.0 0x83 -62.0 0xa8 -43.5 0xcd -25.0 0xf2 -6.5 0x84 -61.5 0xa9 -43.0 0xce -24.5 0xf3 -6.0 0x85 -61.0 0xaa -42.5 0xcf -24.0 0xf4 -5.5 0x86 -60.5 0xab -42.0 0xd0 -23.5 0xf5 -5.0 0x87 -60.0 0xac -41.5 0xd1 -23.0 0xf6 -4.5 0x88 -59.5 0xad -41.0 0xd2 -22.5 0xf7 -4.0 0x89 -59.0 0xae -40.5 0xd3 -22.0 0xf8 -3.5 0x8a -58.5 0xaf -40.0 0xd4 -21.5 0xf9 -3.0 0x8b -58.0 0xb0 -39.5 0xd5 -21.0 0xfa -2.5 0x8c -57.5 0xb1 -39.0 0xd6 -20.5 0xfb -2.0 0x8d -57.0 0xb2 -38.5 0xd7 -20.0 0xfc -1.5 0x8e -56.5 0xb3 -38.0 0xd8 -19.5 0xfd -1.0 0x8f -56.0 0xb4 -37.5 0xd9 -19.0 0xfe -0.5 0x90 -55.5 0xb5 -37.0 0xda -18.5 0xff 0.0 (prohibit setting) 0x91 -55.0 0xb6 -36.5 0xdb -18.0 0x92 -54.5 0xb7 -36.0 0xdc -17.5 play hpf2 setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x46 0x47 - - hpf2csel plhpf2od plhpf2en - - 000000 index plhpf2cut play hpf2 setting register b this register is a setting register of hpf for the reproduction. in the case of coefsel =0, plhpf2en, plhpf2od, plhpf2cut, the register level of hpf2cel are effective. in the case of coefsel=1, plhpf2enb, plhpf2odb, plhpf2cutb, the value of the hpf2celb register become effective. plhpf2en/ plhpf2enb this bit is enables hpf for the reproduction. plhpf2en/ plhpf2enb explanation 0 disable 1 enable downloaded from: http:///
datasheet d a t a s h e e t 53/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv plhpf2od/ plhpf2odb this bit sets the degree of hpf for the reproduction. plhpf2od/ plhpf2odb explanation 0 the second order 1 the first order plhpf2cut/ plhpf2cutb this bit sets the cut-off frequency of hpf for reproduction. in the case of "0", hpf2cel becomes effective for setting t his bit . plhpf2cut/ plhpf2cutb fs=8,16,32khz 0x00 80hz 0x01 100hz 0x02 130hz 0x03 160hz 0x04 200hz 0x05 260hz 0x06 320hz 0x07 400hz hpf2cel/ hpf2celb i make hpf at the time of the reproduction programmable, or i make it parametric, or this bit sets it. hpf2cel/ hpf2celb explanation 0 plhpf2cut is effective. 1 phpf2coefl/h is effective. amplifier volume control function enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 0 0 x 4 8 0 x 4 9------a v m u t e a v f a d e ------00 index this register controls the fading function of the analog volume. avfade it sets the fading function of the analog volume to on/off. avfade explanation 0 fading function off when a register set point of avol is just used for a real volume price and wants to do it and changes a value, setting of the analog volume is updated immediately. 1 fading function on when a register set point of avol was updated, a gain of the analog volume changes by a +/-1 step towards a register set point after the update in step time for avfcon register setting. avmute when this is set, mute becomes effective for the analog volume at the time of reproduction. it can control fading for the mute shift by this bit by the analog volume forcibly by avfade. avmute explanation 0 as for the analog volume, a register set point of avol is effective. 1 at the time of re-start: the analog volume is set to mute. it comes back to the setting volume in avol by canceling it because it writes it. this register level of avol cannot be replaced by the setting of this bit. downloaded from: http:///
datasheet d a t a s h e e t 54/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv amplifier volume fader control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x4a 0x4b - - - - - -----000 index avfcon this register controls the amplifier volume fade function. avfcon[2:0] these bits are to set the volume change step time of the amplifier volume fade function. the volume changes step by step with this setting period. step time is in proportion to sampling frequency (fs) as following table. avfcon[2:0] fs conversion time(fs=48khz) 0x0 1/fs 20.8s 0x1 4/fs 83.3s 0x2 16/fs 333s 0x3 64/fs 1.33ms 0x4 256/fs 5.33ms 0x5 1024/fs 21.3ms 0x6 4096/fs 85.3ms 0x7 16384/fs 341.ms play programmable hpf2 coefl register play programmable hpf2 coefh register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x4c 0x4d 00000000 0x0 0x4e 0x4f - - 00000000 phpf2c0h phpf2c0l index play programmable hpf2 coefl register b play programmable hpf2 coefh register b mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x2 0x4c 0x4d 00000000 0x2 0x4e 0x4f - - 00000000 phpf2c0lb phpf2c0hb index it is the register settings of the programmable high path filter cut-off frequency for the reproduction. hpf2csel bit becomes effective when the register value is equal to "1". if coefsel=0, then the register level of phpf2c0l, phpf2c0h is effective. if coefsel=1, then the register level of phpf2c0lb, phpf2c0hb is effective. phpf2c0l [7:0]/ phpf2c0lb [7:0] phpf2c0h [7:0]/ phpf2c0hb [7:0] this sets the cut-off frequency of the programmable high path filter for the reproduction. please refer for the setting method. downloaded from: http:///
datasheet d a t a s h e e t 55/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv dac clock setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x58 0x59 - - - - - - --00---- index osrsel this register sets the dac clock movement to be used in this lsi. osrsel [1:0] this register decides sampling frequency. setting explanation 0x0 8k,11.025k,12khz 0x1 16k,22.05k,24khz 0x2 32k,44.1k,48khz 0x3 this is prohibited from setting mic interface control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x5a 0x5b - - - mindif - 100---0- index minvol this register controls the microphone input interface. mindif it sets the mic movement mode. setting explanation 0 single-end mode 1 differential mode minvol this bit sets the analog mic volume. minvol gain 0x00 6db 0x01 9db 0x02 12db 0x03 15db 0x04 18db 0x05 21db 0x06 24db 0x07 27db sound effect mode register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x5c 0x5d semode[7] ---- 0- - - -000 index semode[2:0] sound effect mode register b mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x2 0x5c 0x5d semodeb[7] ---- 0----000 index semodeb[2:0] if coefsel=0, then the register level of semode is effective. if coefsel=1, then the value of the semodeb register becomes effective. downloaded from: http:///
datasheet d a t a s h e e t 56/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv semode [7]/semodeb [7] you choose a course putting filter block, and please refer to the clause of "the signal flow" of "the function explanation" for filter block. semode[7]/ semodeb [7] explanation 0 use filter block on recording path. 1 use filter block on playback path. semode [2:0]/ semodeb [2:0] this sets distribution of eq/notch filter. semode[2:0]/ semodeb[2:0] explanation 0x0 notch5 band / eq0 band 0x1 notch4 band / eq1 band 0x2 notch3 band / eq2 band 0x3 notch2 band / eq3 band 0x4 notch1 band / eq4 band 0x5 notch0 band / eq5 band when "0x01" is set, band0 to band3 filters notch, and band4 becomes the eq. sai transmitter control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x60 0x61 fmto msbo isscko afoo dlyo wslo 11000000 pcmfo24 index this register controls the sai transmission format setting. the recplay bit of the record/playback running control register, please change this register in recording stop state (0x0), and please use it by setting again same as the sai reception side (sai receiver control register). wslo you appoint lrclk polarity at the time of the transmission of this lsi, and please set this bit in "1" in (fmto at the time of "1") in a transfer mode by all means in the frame same period. setting explanation 0 left channel transmission at sai_lrclk is l level; right channel transmission at sai_lrclk is h level. 1 left channel transmission at sai_lrclk is h level; right channel transmission at sai_lrclk is l level.l dlyo this bit appoints 1 clock delay existence / nothing of transmission data. setting explanation 0 serial data delay existence 1 serial data delay nothing afoo you appoint in front of filling / attacking th e enemy from behind of transmission data, a nd, in the case of a slave mode, this bit is ignored, and it is in previous final stage is fixed, and pl ease set this bit in "0" in (fmto at the time of "1") in a tr ansfer mode by all means in the frame same period. setting explanation 0 left-justify 1 right-justify isscko this bit sets bclk terminal to 32fs/64fs. setting explanation 0 32fs 1 64fs msbo this bit sets the msb first /lsb first data transmission. setting explanation 0 msb first 1 lsb first downloaded from: http:///
datasheet d a t a s h e e t 57/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv fmto this bit sets the transmission mode. setting explanation 0 lrclk transfer mode 1 frame synchronization transfer mode pcmfo24 this bit sets pcm format of the sai transmission. setting explanation 0x2 16bit pcm 0x3 24bit pcm other than the above this is prohibited from setting sai receiver control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x62 0x63 fmti msbi isscki afoi dlyi wsli 11000000 index pcmfi24 this register is a register controlling sai reception format setting, and recplay bit of the record/playback running control register, please change this register in recording stop state (0x0), and please use it by setting again same as the sai transmission side (sai transmitter control register). wsli this bit selects lrclk polarity of the lsi. this bit must be set to 1 when at flame synchronous transfer mode (fmti is 1). setting explanation 0 left channel is received when sai_lrclk is l level, right channel is received at sai_lrclk is h level. 1 left channel is received when sai_lrclk is h level, right channel is received at sai_lrclk is l level. dlyi this bit specifies the existence for serial input data one clock delay of master device. setting explanation 0 serial data delay existence 1 serial data delay nothing afoi this bit sets the receiving data to be left-justify or right-justify. this bit must be set to 0 when at flame synchronous transfer mode (fmti is 1). setting explanation 0 left-justify 1 right-justify isscki this bit sets the sampling frequency of sai_bclk pin. setting explanation 0 32fs 1 64fs msbi this bit sets the sai receiving data to be msb-first or lsb-first. setting explanation 0 msb first 1 lsb first fmti this bit sets the receiving mode setting explanation 0 lrclk transfer mode 1 frame synchronization transfer mode downloaded from: http:///
datasheet d a t a s h e e t 58/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv pcmfi24 this bit sets the sai pcm receiving format. setting explanation 0x2 16bit pcm 0x3 24bit pcm other than the above this is prohibited from setting sai mode select register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x64 0x65 - - - bswp - - - mst - - -0- - -0 index this register is a register setting a movement mode of sai, and recplay bit of the record/playback running control register, please change this register in recording stop state (0x0). mst it appoints whether this bit uses sai with a master mode or a slave mode. setting explanation 0 slave mode 1 master mode bswp as for this bit, it is done byte swap i2s data with pcm format by 16bitpcm without depending on the setting of the i2s receiver control/i2s transmitter control register at the time of setting when i set byte swap having i2s or not on the same side of transmission and reception data and there is byte swap and sets it. setting explanation 0 there is no byte swap (16bit data line up :15bit-8bit,7bit-0bit) (24bit data line up :23bit-16bit,15bit-8bit,7bit-0bit) 1 there is byte swap (16bit data line up :7bit-0bit,15bit-8bit) (24bit data line up :7bit-0bit,15bit-8bit 23bit-16bit) dsp filter function enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x66 0x67 hpf2od eq4en eq3en eq2en eq1en eq0en hpf2en hpf1en 00000001 index dsp filter function enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x66 0x67 hpf2od eq4en eq3en eq2en eq1en eq0en hpf2en hpf1en 00000001 index dsp filter function enable register b mapcon b07 b06 b05 b04 b03 b02 b01 b00 rw( i n i t i a l ) 0x2 0x66 0x67 hpf2odb eq4enb eq3enb eq2enb eq1enb eq0enb hpf2enb hpf1enb 00000001 index this register sets the filter function of the digital code processing on/off. if coefsel=0, then register level of hpf1/2en, eq0/1/2/3/4e n, hpf2od is effective. if coefsel=1, then value of hpf1/2enb, eq0/1/2/3/4enb, hpf2odb register becomes effective. downloaded from: http:///
datasheet d a t a s h e e t 59/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv hpf1en/ hpf1enb this bit is to set on or off of a first-order high pass filt er for dc cut. do not change this bit during operation of the recording (0x13/0x14: recplay=0x1, 0x3, or 0x7). if this bit is changed, the noise may be generated. when this ic being operated the playing (recplay=0x2), this bit operating don't have effective. hpf1en/ hpf1enb explanation 0 primary high-pass filter off for the dc cut 1 primary high-pass filter on for the dc cut hpf2en/ hpf2enb this bit is to set on or off of a second-order high pass filt er for noise cut. do not change this bit during operation of the recording (recplay=0x1,0x3, or 0x7). if this bit is changed, the noise may be generated. the bit of hpf2en is effective only when 0xa6/0xa7:rlpfen is enable. hpf2en/ hpf2enb explanation 0 second high-pass filter off for noise reduction 1 second high-pass filter on for noise reduction eq0en/eq0enb this bit is to set on or off of equalizer band 0. in case of changing this bit during recording and playback operation (recplay=0x1, 0x2, 0x3, or 0x7), enables digital volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq0en/ eq0enb explanation 0 equalizer band 0 off 1 equalizer band 0 on eq1en/eq1enb this bit is to set on or off of equalizer band 1. in case of changing this bit during recording and playback operation (0x13/0x14: recplay=0x1, 0x2, 0x3, or 0x7), enables digital volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq1en/ eq1enb explanation 0 equalizer band 1 off 1 equalizer band 1 on eq2en/eq2enb this bit is to set on or off of equalizer band 2. in case of changing this bit during recording and playback operation (0x13/0x14: recplay=0x1, 0x2, 0x3, or 0x7), enables digital volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq2en/ eq2enb explanation 0 equalizer band 2 off 1 equalizer band 2 on eq3en/eq3enb this bit is to set on or off of equalizer band 3. in case of changing this bit during recording and playback operation (0x13/0x14: recplay=0x1, 0x2, 0x3, or 0x7), enables digital volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq3en/ eq3enb explanation 0 equalizer band 3 off 1 equalizer band 3 on eq4en/eq4enb this bit is to set on or off of equalizer band 4. in case of changing this bit during recording and playback operation (0x13/0x14: recplay=0x1, 0x2, 0x3, or 0x7), enables digital volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq4en/ eq4enb explanation 0 equalizer band 4 off 1 equalizer band 4 on downloaded from: http:///
datasheet d a t a s h e e t 60/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv hpf2od/hpfodb this bit is to set number of high pass filter order (hpf2en bi t) for noise cut. in recording or playback operation(0x13/0x14: recplay 0 ,do not change this bit. if this bit is changed, the noise may be generated. hpf2od/ hpf2odb explanation 0 the second filter 1 primary filter digital volume control function enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x68 0x69 - - - dvmute dvfade - ralcen palcen ---00-00 index this register sets on/off of digital, the volume control function. palcen this bit is to set on or off of the playing alc. it must not be wrote during recording and playback operation (0x13/0x14: recplay=0x1, 0x3, or 0x7). if this bit was set as the operation, this ic cannot guarantee correct operating. palcen explanation 0 reproduction alc off 1 reproduction alcon ralcen this bit is to set on or off of the recording alc. it must not be wrote during recording and playback operation (0x13/0x14: recplay=0x2). if this bit was set as the operation, this ic cannot guarantee correct operating. ralcen explanation 0 recording alc off 1 recording alc on dvfade this bit is to set on or off of the digital volume fade function. the fade function is effective for recording/playback digital volume and equalizer gain. dvfade explanation 0 fading function off: the register setting value of rdatt, pdatt and eqgain0 to 3 is used actual volume value as it is. therefore the value is effective immediate. 1 fading function on: the volume is changing to the register setting value of rdatt, pdatt and eqgain0 to 3 with 1 step per dvfcon register step time. dvmute this bit is to set mute of the digital volume. this mute function is effective for the recording digital volume at record ing an d effective for playback digital volume at playback. the fade function by dvfade is effective against the volume change by this bit. dvmute explanation 0 register value of rdvol and pdatt is effective. 1 digital volume is set to mute. register value of rdvol and pdatt cannot be changed by this bit, the volume is resumed by releasing this bit (dvmute=0) to the original setting value of rdvol and pdvol. downloaded from: http:///
datasheet d a t a s h e e t 61/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv mixer & volume control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x6a 0x6b 00000000 rmcon lmcon index dvfcon this register controls l/r mixer processing at the time of the sai reception and a fading function of the digital volume. lmcon[1:0] this bit sets the input channel of sai reception data of the dac (lch). setting explanation 0x0 i use l 0x1 i use r 0x2 i use (l+r) 0x3 i use (l+r)/2 rmcon[1:0] this bit sets it about sai reception data which channel you input into dac (rch). setting explanation 0x0 i use r 0x1 i use l 0x2 i use (l+r) 0x3 i use (l+r)/2 dvfcon[3:0] these bits are to set the volume change step time of the digital volume fade function. the volume changes step by step (0.5db) with this setting period. step time is in proportion to sampling frequency (fs) as following table. setting fs conversion time(fs=48khz) 0x0 1/fs 20.8s 0x1 2/fs 41.7s 0x2 4/fs 83.3s 0x3 8/fs 167s 0x4 16/fs 333s 0x5 32/fs 667s 0x6 64/fs 1.33ms 0x7 128/fs 2.67ms 0x8 256/fs 5.33ms 0x9 512/fs 10.7ms 0xa 1024/fs 21.3ms 0xb 2048/fs 42.7ms 0xc 4096/fs 85.3ms 0xd 8192/fs 171ms 0xe 16384/fs 341ms record digital attenuator control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x6c 0x6d 11111111 index rdvol this register sets digital volume gain of the recording course. mute could be set from -71.5db to 0.0db by 0.5db step. downloaded from: http:///
datasheet d a t a s h e e t 62/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv rdatt[7:0] setting gain(db) setting gain(db) setting gain (db) setting gain(db) 0x00 - 0x6e this is prohibited from setting 0x93 -54.0 0xb8 -35.5 0xdd -17.0 0x6f mute 0x94 -53.5 0xb9 -35.0 0xde -16.5 0x70 -71.5 0x95 -53.0 0xba -34.5 0xdf -16.0 0x71 -71.0 0x96 -52.5 0xbb -34.0 0xe0 -15.5 0x72 -70.5 0x97 -52.0 0xbc -33.5 0xe1 -15.0 0x73 -70.0 0x98 -51.5 0xbd -33.0 0xe2 -14.5 0x74 -69.5 0x99 -51.0 0xbe -32.5 0xe3 -14.0 0x75 -69.0 0x9a -50.5 0xbf -32.0 0xe4 -13.5 0x76 -68.5 0x9b -50.0 0xc0 -31.5 0xe5 -13.0 0x77 -68.0 0x9c -49.5 0xc1 -31.0 0xe6 -12.5 0x78 -67.5 0x9d -49.0 0xc2 -30.5 0xe7 -12.0 0x79 -67.0 0x9e -48.5 0xc3 -30.0 0xe8 -11.5 0x7a -66.5 0x9f -48.0 0xc4 -29.5 0xe9 -11.0 0x7b -66.0 0xa0 -47.5 0xc5 -29.0 0xea -10.5 0x7c -65.5 0xa1 -47.0 0xc6 -28.5 0xeb -10.0 0x7d -65.0 0xa2 -46.5 0xc7 -28.0 0xec -9.5 0x7e -64.5 0xa3 -46.0 0xc8 -27.5 0xed -9.0 0x7f -64.0 0xa4 -45.5 0xc9 -27.0 0xee -8.5 0x80 -63.5 0xa5 -45.0 0xca -26.5 0xef -8.0 0x81 -63.0 0xa6 -44.5 0xcb -26.0 0xf0 -7.5 0x82 -62.5 0xa7 -44.0 0xcc -25.5 0xf1 -7.0 0x83 -62.0 0xa8 -43.5 0xcd -25.0 0xf2 -6.5 0x84 -61.5 0xa9 -43.0 0xce -24.5 0xf3 -6.0 0x85 -61.0 0xaa -42.5 0xcf -24.0 0xf4 -5.5 0x86 -60.5 0xab -42.0 0xd0 -23.5 0xf5 -5.0 0x87 -60.0 0xac -41.5 0xd1 -23.0 0xf6 -4.5 0x88 -59.5 0xad -41.0 0xd2 -22.5 0xf7 -4.0 0x89 -59.0 0xae -40.5 0xd3 -22.0 0xf8 -3.5 0x8a -58.5 0xaf -40.0 0xd4 -21.5 0xf9 -3.0 0x8b -58.0 0xb0 -39.5 0xd5 -21.0 0xfa -2.5 0x8c -57.5 0xb1 -39.0 0xd6 -20.5 0xfb -2.0 0x8d -57.0 0xb2 -38.5 0xd7 -20.0 0xfc -1.5 0x8e -56.5 0xb3 -38.0 0xd8 -19.5 0xfd -1.0 0x8f -56.0 0xb4 -37.5 0xd9 -19.0 0xfe -0.5 0x90 -55.5 0xb5 -37.0 0xda -18.5 0xff 0.0 0x91 -55.0 0xb6 -36.5 0xdb -18.0 0x92 -54.5 0xb7 -36.0 0xdc -17.5 playback effect volume control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x70 0x71 11111111 index effect vol playback effect volume control register b mapcon b07 b06 b05 b04 b03 b02 b01 b00 rw( i n i t i a l ) 0x2 0x70 0x71 11111111 effect volb index this register sets the digital volume gain of the reproducti on course. if coefsel=0, then register level of effect vol is effective. if coefsel=1, then value of the effect vol b register becomes effective. mute could be set from -71.5db to 0.0db by 0.5db step. downloaded from: http:///
datasheet d a t a s h e e t 63/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv effect vol[7:0]/ effect vol b[7:0 sets the digital volume gain. effect vol/ effect vol b gain(db) setting gain (db) setting gain(d b) setting gain(db) 0x00 - 0x6e this is prohibited from setting 0x93 -54.0 0xb8 -35.5 0xdd -17.0 0x6f mute 0x94 -53.5 0xb9 -35.0 0xde -16.5 0x70 -71.5 0x95 -53.0 0xba -34.5 0xdf -16.0 0x71 -71.0 0x96 -52.5 0xbb -34.0 0xe0 -15.5 0x72 -70.5 0x97 -52.0 0xbc -33.5 0xe1 -15.0 0x73 -70.0 0x98 -51.5 0xbd -33.0 0xe2 -14.5 0x74 -69.5 0x99 -51.0 0xbe -32.5 0xe3 -14.0 0x75 -69.0 0x9a -50.5 0xbf -32.0 0xe4 -13.5 0x76 -68.5 0x9b -50.0 0xc0 -31.5 0xe5 -13.0 0x77 -68.0 0x9c -49.5 0xc1 -31.0 0xe6 -12.5 0x78 -67.5 0x9d -49.0 0xc2 -30.5 0xe7 -12.0 0x79 -67.0 0x9e -48.5 0xc3 -30.0 0xe8 -11.5 0x7a -66.5 0x9f -48.0 0xc4 -29.5 0xe9 -11.0 0x7b -66.0 0xa0 -47.5 0xc5 -29.0 0xea -10.5 0x7c -65.5 0xa1 -47.0 0xc6 -28.5 0xeb -10.0 0x7d -65.0 0xa2 -46.5 0xc7 -28.0 0xec -9.5 0x7e -64.5 0xa3 -46.0 0xc8 -27.5 0xed -9.0 0x7f -64.0 0xa4 -45.5 0xc9 -27.0 0xee -8.5 0x80 -63.5 0xa5 -45.0 0xca -26.5 0xef -8.0 0x81 -63.0 0xa6 -44.5 0xcb -26.0 0xf0 -7.5 0x82 -62.5 0xa7 -44.0 0xcc -25.5 0xf1 -7.0 0x83 -62.0 0xa8 -43.5 0xcd -25.0 0xf2 -6.5 0x84 -61.5 0xa9 -43.0 0xce -24.5 0xf3 -6.0 0x85 -61.0 0xaa -42.5 0xcf -24.0 0xf4 -5.5 0x86 -60.5 0xab -42.0 0xd0 -23.5 0xf5 -5.0 0x87 -60.0 0xac -41.5 0xd1 -23.0 0xf6 -4.5 0x88 -59.5 0xad -41.0 0xd2 -22.5 0xf7 -4.0 0x89 -59.0 0xae -40.5 0xd3 -22.0 0xf8 -3.5 0x8a -58.5 0xaf -40.0 0xd4 -21.5 0xf9 -3.0 0x8b -58.0 0xb0 -39.5 0xd5 -21.0 0xfa -2.5 0x8c -57.5 0xb1 -39.0 0xd6 -20.5 0xfb -2.0 0x8d -57.0 0xb2 -38.5 0xd7 -20.0 0xfc -1.5 0x8e -56.5 0xb3 -38.0 0xd8 -19.5 0xfd -1.0 0x8f -56.0 0xb4 -37.5 0xd9 -19.0 0xfe -0.5 0x90 -55.5 0xb5 -37.0 0xda -18.5 0xff 0.0 0x91 -55.0 0xb6 -36.5 0xdb -18.0 0x92 -54.5 0xb7 -36.0 0xdc -17.5 downloaded from: http:///
datasheet d a t a s h e e t 64/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv eq band0 gain setting register eq band1 gain setting register eq band2 gain setting register eq band3 gain setting register eq band4 gain setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x74 0x75 11100111 0x0 0x76 0x77 11100111 0x0 0x78 0x79 11100111 0x0 0x7a 0x7b 11100111 0x0 0x7c 0x7d 11100111 eqgain4 eqgain3 eqgain2 eqgain1 index eqgain0 eq band0 gain setting register b eq band1 gain setting register b eq band2 gain setting register b eq band3 gain setting register b eq band4 gain setting register b mapcon b07 b06 b05 b04 b03 b02 b01 b00 rw( i n i t i a l ) 0x2 0x74 0x75 11100111 0x2 0x76 0x77 11100111 0x2 0x78 0x79 11100111 0x2 0x7a 0x7b 11100111 0x2 0x7c 0x7d 11100111 eqgain0b eqgain1b index eqgain2b eqgain3b eqgain4b this register sets the gain of each band of the equalizer. if co efsel=0, then the register level of eqgain0 to 4 is effective. if coefsel=1, then value of the eqgain0b to eqgain4b register becomes effective. this register can set eq gain from -71.5db to 12.0db(step by step 0.5db). also it can set mute. eq can work as a notch filter by mute setting. eqgain/ eqgainb 0 - to 4 [7:0] gain (0db) eqgain/ eqgainb 0 - to4[7:0] gain (0db) eqgain/ eqgainb 0 - to4[7:0] gain (db) eqgain/ eqgainb 0 - to4[7:0] gain (db) 0x00 - to 0x57 mute 0x82 -50.5 0xad -29.0 0xd8 -7.5 0x58 -71.5 0x83 -50.0 0xae -28.5 0xd9 -7.0 0x59 -71.0 0x84 -49.5 0xaf -28.0 0xda -6.5 0x5a -70.5 0x85 -49.0 0xb0 -27.5 0xdb -6.0 0x5b -70.0 0x86 -48.5 0xb1 -27.0 0xdc -5.5 0x5c -69.5 0x87 -48.0 0xb2 -26.5 0xdd -5.0 0x5d -69.0 0x88 -47.5 0xb3 -26.0 0xde -4.5 0x5e -68.5 0x89 -47.0 0xb4 -25.5 0xdf -4.0 0x5f -68.0 0x8a -46.5 0xb5 -25.0 0xe0 -3.5 0x60 -67.5 0x8b -46.0 0xb6 -24.5 0xe1 -3.0 0x61 -67.0 0x8c -45.5 0xb7 -24.0 0xe2 -2.5 0x62 -66.5 0x8d -45.0 0xb8 -23.5 0xe3 -2.0 0x63 -66.0 0x8e -44.5 0xb9 -23.0 0xe4 -1.5 0x64 -65.5 0x8f -44.0 0xba -22.5 0xe5 -1.0 0x65 -65.0 0x90 -43.5 0xbb -22.0 0xe6 -0.5 0x66 -64.5 0x91 -43.0 0xbc -21.5 0xe7 0.0 0x67 -64.0 0x92 -42.5 0xbd -21.0 0xe8 0.5 0x68 -63.5 0x93 -42.0 0xbe -20.5 0xe9 1.0 0x69 -63.0 0x94 -41.5 0xbf -20.0 0xea 1.5 0x6a -62.5 0x95 -41.0 0xc0 -19.5 0xeb 2.0 downloaded from: http:///
datasheet d a t a s h e e t 65/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv 0x6b -62.0 0x96 -40.5 0xc1 -19.0 0xec 2.5 0x6c -61.5 0x97 -40.0 0xc2 -18.5 0xed 3.0 0x6d -61.0 0x98 -39.5 0xc3 -18.0 0xee 3.5 0x6e -60.5 0x99 -39.0 0xc4 -17.5 0xef 4.0 0x6f -60.0 0x9a -38.5 0xc5 -17.0 0xf0 4.5 0x70 -59.5 0x9b -38.0 0xc6 -16.5 0xf1 5.0 0x71 -59.0 0x9c -37.5 0xc7 -16.0 0xf2 5.5 0x72 -58.5 0x9d -37.0 0xc8 -15.5 0xf3 6.0 0x73 -58.0 0x9e -36.5 0xc9 -15.0 0xf4 6.5 0x74 -57.5 0x9f -36.0 0xca -14.5 0xf5 7.0 0x75 -57.0 0xa0 -35.5 0xcb -14.0 0xf6 7.5 0x76 -56.5 0xa1 -35.0 0xcc -13.5 0xf7 8.0 0x77 -56.0 0xa2 -34.5 0xcd -13.0 0xf8 8.5 0x78 -55.5 0xa3 -34.0 0xce -12.5 0xf9 9.0 0x79 -55.0 0xa4 -33.5 0xcf -12.0 0xfa 9.5 0x7a -54.5 0xa5 -33.0 0xd0 -11.5 0xfb 10.0 0x7b -54.0 0xa6 -32.5 0xd1 -11.0 0xfc 10.5 0x7c -53.5 0xa7 -32.0 0xd2 -10.5 0xfd 11.0 0x7d -53.0 0xa8 -31.5 0xd3 -10.0 0xfe 11.5 0x7e -52.5 0xa9 -31.0 0xd4 -9.5 0xff 12.0 0x7f -52.0 0xaa -30.5 0xd5 -9.0 0x80 -51.5 0xab -30.0 0xd6 -8.5 0x81 -51.0 0xac -29.5 0xd7 -8.0 high pass filter2 cut-off control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x7e 0x7f - - - - - -----000 index hpf2cut this register is to set the cut-off frequency of the high-pass filter for the noise reduction during recording. dont change the setting of this register under the filter pr ocessing concerned(hpf2en="1" and relplay=0x1,0x3 or 0x7). hpf2cut[2:0] these set the cut-off frequency of the noise reduction high-pass filter during recording and the numerical value of below list expresses 1.5db damping and 3db damping frequency in each second order filter(hpf2od="1") and one order filter (hpf2od="0"). hpf2cut [2:0] cut-off frequency(hz) fs=8khz, 16khz, 32khz fs=11.025khz, 22.05khz, 44.1khz fs=12khz, 24khz, 48khz 0x0 80 110 120 0x1 100 138 150 0x2 130 179 195 0x3 160 221 240 0x4 200 276 300 0x5 260 358 390 0x6 320 441 480 0x7 400 551 600 downloaded from: http:///
datasheet d a t a s h e e t 66/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv programmable equalizer band0 coefficient-a0 (l) register programmable equalizer band0 coefficient-a0 (h) register programmable equalizer band0 coefficient-a1 (l) register programmable equalizer band0 coefficient-a1 (h) register programmable equalizer band1 coefficient-a0 (l) register programmable equalizer band1 coefficient-a0 (h) register programmable equalizer band1 coefficient-a1 (l) register programmable equalizer band1 coefficient-a1 (h) register programmable equalizer band2 coefficient-a0 (l) register programmable equalizer band2 coefficient-a0 (h) register programmable equalizer band2 coefficient-a1 (l) register programmable equalizer band2 coefficient-a1 (h) register programmable equalizer band3 coefficient-a0 (l) register programmable equalizer band3 coefficient-a0 (h) register programmable equalizer band3 coefficient-a1 (l) register programmable equalizer band3 coefficient-a1 (h) register programmable equalizer band4 coefficient-a0 (l) register programmable equalizer band4 coefficient-a0 (h) register programmable equalizer band4 coefficient-a1 (l) register programmable equalizer band4 coefficient-a1 (h) register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x80 0x81 00000000 0x0 0x82 0x83 00000000 0x0 0x84 0x85 00000000 0x0 0x86 0x87 00000000 0x0 0x88 0x89 00000000 0x0 0x8a 0x8b 00000000 0x0 0x8c 0x8d 00000000 0x0 0x8e 0x8f 00000000 0x0 0x90 0x91 00000000 0x0 0x92 0x93 00000000 0x0 0x94 0x95 00000000 0x0 0x96 0x97 00000000 0x0 0x98 0x99 00000000 0x0 0x9a 0x9b 00000000 0x0 0x9c 0x9d 00000000 0x0 0x9e 0x9f 00000000 0x0 0xa0 0xa1 00000000 0x0 0xa2 0xa3 00000000 0x0 0xa4 0xa5 00000000 0x0 0xa6 0xa7 00000000 eq4a1h eq4a1l eq4a0h eq4a0l eq3a1h eq3a1l eq3a0h eq3a0l eq2a1h eq2a1l eq2a0h eq2a0l eq1a1h eq1a1l eq1a0h eq1a0l eq0a1h eq0a1l eq0a0h eq0a0l index downloaded from: http:///
datasheet d a t a s h e e t 67/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x2 0x7e 0x7f 00000000 0x2 0x80 0x81 00000000 0x2 0x82 0x83 00000000 0x2 0x84 0x85 00000000 0x2 0x86 0x87 00000000 0x2 0x88 0x89 00000000 0x2 0x8a 0x8b 00000000 0x2 0x8c 0x8d 00000000 0x2 0x8e 0x8f 00000000 0x2 0x90 0x91 00000000 0x2 0x92 0x93 00000000 0x2 0x94 0x95 00000000 0x2 0x96 0x97 00000000 0x2 0x98 0x99 00000000 0x2 0x9a 0x9b 00000000 0x2 0x9c 0x9d 00000000 0x2 0x9e 0x9f 00000000 0x2 0xa0 0xa1 00000000 0x2 0xa2 0xa3 00000000 0x2 0xa4 0xa5 00000000 eq0a0lb eq0a0hb index eq0a1lb eq0a1hb eq1a0lb eq1a0hb eq1a1lb eq1a1hb eq2a0lb eq2a0hb eq2a1lb eq2a1hb eq3a0lb eq3a0hb eq3a1lb eq3a1hb eq4a0lb eq4a0hb eq4a1lb eq4a1hb these registers are to set the coefficients a0 and a1 of each five band programmable equalizer. one coefficients value is specified by two bytes data. the centre frequency and band width of the filter can be set by changing these register value. please dont change the register setting during corresponding filter operation eq0a0l to eq4a1h are became effective at coefsel=0 and eq0a0lb to eq4a1hb are became effective at coefsel=1. the detailed setting value is described in the filter function. downloaded from: http:///
datasheet d a t a s h e e t 68/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv zero detection setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xdc 0xdd - - - zden 0000 - - - 0 index zdtime this register controls zero detection for low power cons umption mode. when zero detection is enable and "0" data are inputted in succession, a part of internal clock and speaker amplifier goes to disable to operate under low power consumption. controlling a zero detection function for low power consumption mode movement, and enabling this function, some internal clocks stop it, and a speaker amplifier is disabled. when data, not 0 data, is input, the disable block starts operation again. in addition, the zero detection is effective only speaker amplifier playing mode. in the other modes, please set zden bit in "0". zden enables/disables the zero detection function. zden explanation 0x0 a zero detection function is disabled. 0x1 a zero detection function is enabled. zerotim sets "0" detection period. when "0" continues more than the following set points in succession with lch/rch, it be comes low power consumption mode. zerotim explanation 0x00 256/fs 0x01 512/fs 0x02 1024/fs 0x03 2048/fs 0x04 4096/fs 0x05 8192/fs 0x06 16384/fs 0x07 32768/fs 0x08 65536/fs 0x09 131072/fs 0x0a 262144/fs 0x0b to 0x0f this is prohibited from setting mic select control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 0 0 x e 8 0 x e 9------m i n 2 e n m i n 1 e n ------01 index this register sets microphone input. min1en using min1 terminal in analog mic. setting explanation 0 does not use min1 terminal. 1 use min1 terminal. min2en using min2 terminal in analog mic. please set it in "0" when in the differential mode. setting explanation 0 does not use min2 terminal. 1 use min2 terminal. downloaded from: http:///
datasheet d a t a s h e e t 69/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv fpll m setting register fpll n setting (l) register fpll n setting (h) register fpll d setting register fpll f setting (l) register fpll f setting (h) register fpll f_d setting (l) register fpll f_d setting (h) register fpll v setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0x02 0x03 - - - - - -----000 0x1 0x04 0x05 00000000 0 x 1 0 x 0 6 0 x 0 7-------f p l l n h -------0 0x1 0x08 0x09 - - - - - - 00000 0x1 0x0a 0x0b 00000000 0x1 0x0c 0x0d 00000000 0x1 0x0e 0x0f 00000000 0x1 0x10 0x11 00000000 0x1 0x12 0x13 - - - - ----0000 fpllv fpllfdh fpllfdl fpllfh fpllfl fplld fpllnl index fpllm this register sets the output frequency of pll. please use your prepared clock setting register level that is computed separately using clock setting calculation tool. the register set point and the relations of the output frequency are streets of the lower expression. pll output frequency (hz)=pll input frequency / fpllm x (fplln+fplld/16+fpllf/fpllf_d/16) *2 / fpllv soft clip enable register soft clip threshold h register soft clip threshold m register soft clip threshold l register soft clip gain register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 1 0 x 2 0 0 x 2 1-------s c e n -------0 0x1 0x22 0x23 - - 0000000 0x1 0x24 0x25 00000000 0x1 0x26 0x27 00000000 0x1 0x28 0x29 - - - - - -----001 scgain scthrl scthrm index scthrh this register controls the soft clip function. downloaded from: http:///
datasheet d a t a s h e e t 70/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv scen sets the soft clip enable. setting explanation 0 disable 1 enable scthrh scthrm scthrl this register sets the soft clip threshold level. when pcm signal with more than of this bit is input, the lsi clips it according to a value of scgain and works. the value of threshold level is 23bit (scthrm [6:0], scthrm [7:0], and scthrl [7:0]) please do not change the value of this bit during soft clip function movement. scgain this sets the magnification during soft clip. in addition, please do not change the value of this bit during movement. setting explanation 0x0 double 0x1 1 time (default) 0x2 i double 1/2 0x3 i double 1/4 0x4 i double 1/8 0x5 i double 1/16 0x6 i double 1/32 0x7 i double 1/64 touch adc control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 rw( i n i t i a l ) 1 0x60 0x61 tchen tcha2 tcha1 - tchrsel 0111100 - index this register controls the touch panel interface, and a light, please do "1" in bit 3. tchen this enables and disables the touch panel interface. in the case of "0", this bit is cleared after (an automatic mode in the case of enable), the lead of the ad conversion data of the touch panel interface tcha2 bit by "0". tchen explanation 0x0 a touch panel interface is disabled. 0x1 a touch panel interface is enabled. tcha2 it controls the convert mode of the touch panel interface, and, in the case of "1", this bit interrupts it after the lead of th e ad conversion data of the touch panel interface automatically a nd changes in a mode. the next conversion starts by an automatic mode leading ad conversion result in the case of disable. tcha2 explanation 0x0 an automatic mode is enabled. 0x1 an automatic mode is disabled. tcha1, tcha0 this controls the convert mode of the touch panel interface. tchen tcha2 tcha1, tcha0 explanation tchen=1 * 0x0 it becomes the x-axis measurement mode. * 0x1 it becomes the y-axis measurement mode. * 0x2 it becomes the z1 axis measurement mode. * 0x3 it becomes the z2 axis measurement mode. tchen=0 0x0 0x3 it becomes the interrupt mode. downloaded from: http:///
datasheet d a t a s h e e t 71/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv tchrsel choose interrupt pull up resistance using for one of a touch panel interface. tchrsel explanation 0x0 i interrupt it, and pulling up resistance becomes 50k ? . 0x1 i interrupt it, and pulling up resistance becomes 90k ? . tchmode choose touch panel interface mode. tchmode explanation 0x0 12bit mode 0x1 8bit mode touch adc result1 register touch adc result2 register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0x62 0x63 00000000 0x1 0x64 0x65 - - - - 0000 - - - - adcr2 adcr1 index this register is to get analog-to-digital conversion data of the touch panel interface adc. in the 12bit mode, please read register in order of adcr1 ($62h), adcr2 ($64h). toutchad1 this register is to get analog-to-digital conversion data of the touch panel interface adc. in the 8 bit mode, please read only this register. in the 12 bit mode, this register is higher 8 bits of the 12bit adc output data. toutchad2 this register is to get analog-to-digital conversion data of the touch panel interface adc. in the 8 bit mode, this register value is "0". in the 12 bits mode, this register is lower 4 bits of the 12bit adc output data. headphone amplifier input control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0x82 0x83 - - hprin2en hprin1en --- h p l i n 1 e n --00---0 index this register is to set the input path of the headphones amplifier. please do not set hprin1en bit and the hprin2en bit to "1" simultaneously. please set only either bit to " 1 ". hplin1en this bit is to set the input path of the lch headphones amplifier. hplin1en explanation 0x0 disconnect the output of lch-dac to lch headphones amplifier. 0x1 connect the output of lch-dac to lch headphones amplifier. hprin1en this bit is to set the input path of the rch headphones amplifier. hprin1en explanation 0x0 disconnect the output of lch-dac to rch headphones amplifier. 0x1 connect the output of lch-dac to rch headphones amplifier. hprin2en this bit is to set the input path of the rch headphones amplifier. hprin2en explanation 0x0 disconnect the output of rch-dac to rch headphones amplifier. 0x1 connect the output of rch-dac to rch headphones amplifier. downloaded from: http:///
datasheet d a t a s h e e t 72/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv speaker amplifier input control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0x84 0x85 - - - - spin2en spin1en ----0000 index spvol this register is to set the input path and the volume of the speaker amplifier. spvol this register is to set the volume level of the speaker amplifier. spvol explanation 0x0 0db 0x1 6db 0x2 12db 0x3 18db spin1en this bit is to set the input path of the speaker amplifier. spin1en explanation 0x0 disconnect the output of the lch volume to a speaker amplifier. 0x1 connect the output of the lch volume to a speaker amplifier. spin2en this bit is to set the input path of the speaker amplifier. spin2en explanation 0x0 disconnect the output of the rch volume to a speaker amplifier. 0x1 connect the output of the rch volume to a speaker amplifier. play programmable lpf setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0xa0 0xa1 - - - - - - plpfod plpfen ------00 index this register is to set lpf block for dac-path (playback) in digital signal flow. this is to set enable/disable and filter or der. this function is effective for dac-path (playback) at plpfen=1 and semode [7] =1. plpfen this bit is to set enable/disable of low pass filter for dac-path. plpfen explanation 0 lpf for dac-path is disable 1 lpf for dac-path is enable plpfod this bit is to set number of low pass filter order for dac-path. plpfod explanation 0 lpf for dac-path is second-order 1 lpf for dac-path is first-order play programmable lpf coef (l) register play programmable lpf coef (h) register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0xa2 0xa3 00000000 0x1 0xa4 0xa5 00000000 plpfc0h plpfc0l index this register is to set lpf block for dac-path (playback) in digital signal flow. this is to set enable/disable and filter or der. downloaded from: http:///
datasheet d a t a s h e e t 73/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv plpfc0l [7:0] / plpfcoh [7:0] this bit is to set low pass filter cut off frequency for dac-path. this value has to change by sampling frequency. please use filter setting calculation program for *plpfc0l / plpfc0h setting. rec programmable lpf setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 1 0 x a 6 0 x a 7------r l p f o d r l p f e n ------00 index this register is to set lpf block for adc-path (record) in digital signal flow. this is to set enable/disable and filter orde r. this function is exclusive to hpf2 controlled by hpf2en of dsp filter function enable register. this function is effective for adc-path (record) at rlpfen=1 and semode [7] =1. rlpfen this bit is to set enable/disable of low pass filter for adc-path. rlpfen explanation 0 lpf for dac-path is disable (hpf2 is available) 1 lpf for dac-path is enable (hpf2 is not available. hpf2en-bit is not valid) rlpfod this bit is to set number of low pass filter order for adc-path. rlpfod explanation 0 lpf for adc-path is second-order 1 lpf for adc-path is first-order rec programmable lpf coef (l) register rec programmable lpf coef (h) register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0xa8 0xa9 00000000 0x1 0xaa 0xab 00000000 rlpfc0h index rlpfc0l this register is to set lpf block for adc-path (playback) in digital signal flow. audio analog control2 register hplsen this bit controls the level shifter for headphone amplifier. setting explanation 0x0 disable the level shifter for headphone amplifier 0x1 enable the level shifter for headphone amplifier audio analog control1 register downloaded from: http:///
datasheet d a t a s h e e t 74/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv arefi1en this bit controls the reference current of the analog circuit for the audio block. setting explanation 0x0 disable the reference current of the analog circuit for the audio block. 0x1 enable the reference current of the analog circuit for the audio block. register map control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 2 0 x 1 c 0 x 1 d------ ------00 index mapcon mapcon please refer to a register map about the target register to change front and back side of the register map, and to be replaced by. the register is to set register map. please refer register map about the map of the changing object. setting explanation 0x0 it is accessible to register map0 0x1 it is accessible to register map1 0x2 it is accessible to register map2 0x3 prohibit pll external components setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 20 x 0 0 0 x 0 1-------e x m o d e -------1 index this register is to select use or not use the external filter for pll. exmode this register is to select use or not use the external filter for pll. when you use pll with bclk clock as a clock source , please set it to "1" by all means. exmode explanation 0x00 not use a external filter. 0x01 u se a external filter. downloaded from: http:///
datasheet d a t a s h e e t 75/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv typical performance curves -70 -60 -50 -40 -30 -20 -10 0 -50 -40 -30 -20 -10 0 input level [dbfs] thd+n[db] -50 -40 -30 -20 -10 0 -50 -40 -30 -20 -10 0 input level [dbfs] output level [dbv] -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -50 -40 -30 -20 -10 0 input level [dbfs] thd+n[db] -50 -40 -30 -20 -10 0 -50 -40 -30 -20 -10 0 input level [dbfs] output level [dbv] -90 -80 -70 -60 -50 -40 -30 -20 -10 0 - 8 0- 6 0- 4 0- 2 0 0 input level [dbv] output level [dbfs] figure 41. mic input level [dbv] vs output level [dbfs] analog mic input tot adc out, pdatt=0 figure 43. dac input level [dbfs] vs hpamp output level [ db ] lalcmxgain=6.0db lalcmxgain=-9.0db hvdd1=iovdd=splvdd =sprvdd=3.3v, 25 minvol=27.0db minvol=18.0db minvol=9.0db -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -80 -60 -40 -20 0 input level [dbv] s/(n+d)[db] hvdd=tvdd=cpvdd =spvdd=3.3v , 25 minvol=27.0db minvol=18.0db minvol=9.0db hvdd=tvdd=cpvdd =spvdd=3.3v, 25 hvdd=tvdd=cpvdd =spvdd=3.3v, 25 figure 42. mic input level [dbv] vs s/(n+d) [dbfs] analog mic input tot adc out, pdatt=0 hvdd=tvdd=cpvdd =spvdd=3.3v, 25 figure 44. dac input level [dbfs] vs hpamp thd+n [ db ] figure 45. dac input level [dbfs] vs spamp-d class out p ut level [ db ] hvdd=tvdd=cpvdd =spvdd=3.3v, 25 figure 46. dac input level [dbfs] vs spamp-d class thd+n [ db ] hvdd=tvdd=cpvdd =spvdd=3.3v, 25 spvol=18db spvol=12db spvol=6db spvol=0db spvol=18db spvol =0db spvol=6db spvol=12db downloaded from: http:///
datasheet d a t a s h e e t 76/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv -50 -40 -30 -20 -10 0 - 5 0- 4 0- 3 0- 2 0- 1 0 0 input level [dbfs] output level [dbv] figure 47. dac input level [dbfs] vs spamp-ab class out p ut level [ db ] spvol=18db spvol=12db spvol=6db spvol=0db -70 -60 -50 -40 -30 -20 -10 0 -50 -40 -30 -20 -10 0 input level [dbfs] thd+n[db] figure 48. dac input level [dbfs] vs spamp-ab class thd+n [ db ] spvol=6db spvol=12db spvol=18db spvol=0db hvdd=tvdd=cpvdd =spvdd=3.3v, 25 hvdd=tvdd=cpvdd =spvdd=3.3v, 25 downloaded from: http:///
datasheet d a t a s h e e t 77/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv power dissipation measuring instrument: th-156 (kuwano electrical) measuring status: pcb mounting(rohm) pcb size: 74.2mm 74.2mm 1.6mm (pcb with thermal via) the quarity of the material: fr4 the part of package bottom exposure heat sink connected pcb by solder. pcb (1): 1-layer board (size of copper foil on bottom: 23.69mm2), ja = 125.0 /w pcb (2): 4-layer board (size of copper foil on top and bottom: 23.69mm2, 2nd and 3rd layer size of copper foil on bottom: 5505mm2), ja = 33.2 /w pcb (3): 4-layer board (size of copper foil on bottom: 5505mm2), ja = 27.4 /w please consider power dissipation by an actual using status, and perform the thermal design which has a margin enough. although this product is exposing the frame on the bottom side of a package, heat dissipation processing is performed to this portion, and we assume raising and using heat dissipation efficiency. please use not only pcb-top pattern but also pcb-bottom pattern, taking heat dissipation pattern as large as possible at it. although d-class speaker amplifier have very high efficiency compared with the conventional analog-speaker amplifier and there is also little generation of heat, when continuous action is carried out by the maximum output power, actual power dissipation may exceed pd. please consider the thermal design enough so that power dissipation of averaging output power does not exceed pd. tjmax maximum junction temperature=125 , ta ambient temperature[ ], ja package thermal registance[ /w], poav averaging output power[w], efficiency package power dissipation pd w = tjmax - ta / ja circuit power dissipation pdiss w = poav * 1 / - 1 figure 49.vqfn040v6060 package : downloaded from: http:///
datasheet d a t a s h e e t 78/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv i/o equivalence circuit(s) terminal no. terminal name terminal i/o terminal power equivalent circuit 1 40 hpl hpr o hpvdd 2 hpvdd o cpvdd 4 hpvss o cpvdd 5 cpn o cpvdd 6 spvdd - spvdd 7 8 sdout+ spout- o spvdd downloaded from: http:///
datasheet d a t a s h e e t 79/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv terminal no. terminal name terminal i/o terminal power equivalent circuit 9 spgnd - - 10 vmid o regout 11 micbias cap o hvdd 12 13 min1 min2 i regout 14 hgnd2 - - 15 hgnd1 - - 16 n.c - - downloaded from: http:///
datasheet d a t a s h e e t 80/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv terminal no. terminal name terminal i/o terminal power equivalent circuit 17 hvdd - hvdd 18 regout - hvdd 19 pllc o regout 20 resetb i hvdd 21 30 tsto irqb o hvdd 22 23 25 28 mclki csb/scl sclk/sad sai_sdin i hvdd downloaded from: http:///
datasheet d a t a s h e e t 81/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv terminal no. terminal name terminal i/o terminal power equivalent circuit 24 26 27 sdata/sda sai_lrclk sai_bclk io hvdd 31 32 33 34 yp xp xn yn o tvdd 35 tgnd - - 36 tvdd - tvdd 37 hpcom - - 38 cpvdd - cpvdd downloaded from: http:///
datasheet d a t a s h e e t 82/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv terminal no. terminal name terminal i/o terminal power equivalent circuit 39 cpp - cpvdd downloaded from: http:///
datasheet d a t a s h e e t 83/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv operational notes 1) absolute maximum ratings an excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus dont exceed the absolute maximum ratings of supply voltage, temperature. if any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. 2) gnd voltage make setting of the potential of the gnd terminal so that it will be maintained at the minimum in any operating state. 3) short circuit between terminals and erroneous mounting in order to mount ics on a set pcb, pay thorough attention to the direction and offset of the ics. erroneous mounting can break down the ics. furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the gnd terminal, the ics can break down. 4) operation in strong electromagnetic field be noted that using ics in the strong electromagnetic field can malfunction them. 5) thermal design if use speaker amplifier function, please consider power dissipation by an actual using status, and perform the thermal design which have a margin enough. if an input signal is made excessive in the state with insufficient heat dissipation, desired output power may not only be securable, but the thermal shutdown may operate. 6) thermal shutdown this ic has the thermal shutdown circuit. if the thermal s hutdown operates, speaker output terminal and line output terminal will stop in the open state(high inpedance state).t he thermal shutdown is only a function for suspending the output operation of ic to the last at the time of the thermal run-away under the abnormal condition in which chip temperature(tjmax) exceeded 170 degrees. it is a circuit to protect ic, and the purpose is not offering protection and a guarantee of the set. 7) short protection of output terminals this ic has the short protect function for output terminals. if the short protect function operates, output terminal will be latched and stop in the open state(high inpedance state).after a stop, even if a short state is removed, it does not return to normal operation automatically. please once turn off a power supply or a shutdown signal to make it return, and let turn on again and reboot. 8) operating condition operating voltage and operating temperature are ranges whic h perform basic function. electrical characteristics and absolute maximum rating are not guaranteed in full voltage range or full temperature range. 9) electrical characteristics specification each audio characteristic specification, such as limit output power, total harmonic distortion shows the standard performance of the device, and depends for it on board layout / use parts / power supply part greatly. typical specification value is a value when a device and each parts are directly mounted in the board of rohm's standard. 10) power supply large peak current rushes into a spvdd power supply line at the time of classd speaker amplifier use. the audio characteristic is affected by the value of a power supply decoupling capacitor, and layout. the power supply decoupling capacitor should be layouted (1uf or more) with sufficiently low esr (equivalent series resistance) to most close of ic terminal. moreover, in the design of a board pattern, the wiring of a power supply / gnd line should become low impeda nce. in that case, even if digital power supply and analog power supply are same potential, please devide the digital power pattern and the analog power pattern and reduce a surroundings lump of the digital noise to the analog power supply by the common impedance of a wiring pattern. please take the same pattern design into consideration also about a gnd line. moreover, while inserting a capacitor between power supply-gnd terminals about all the power suppl y terminals of lsi, and please determine the value of capacitor after sufficient confirmation that there is no problem in the characteristics of capacitors to be used (a ca pacity omission happens at low temperature) in the case of electrolytic capacitors use. 11) external capacitor in order to use a ceramic capacitor as the external capaci tor, determine the constant with consideration given to a degradation in the nominal capacitance due to dc bias and changes in the capacitance due to temperature, etc. 12) status of this document downloaded from: http:///
datasheet d a t a s h e e t 84/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv the japanese version of this document is formal specification. a customer may use this translation version only for a reference to help reading the formal version. if there are any differences in translation version of this document formal version takes priority. downloaded from: http:///
datasheet d a t a s h e e t 85/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv ordering information b u 2 6 1 5 4 m u v - e 2 part number package muv:vqfp040v6060 packaging and forming specification e2: embossed tape and reel physical dimension, tape and reel information package name vqfn040v6060 marking diagrams vqfn040v6060 (top view) bu26154 part number marking lot number 1pin mark ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tapequantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2000pcs e2 () direction of feed reel 1pin downloaded from: http:///
datasheet d a t a s h e e t 86/86 tsz02201-0v2v0e500110-1-2 ? 2014 rohm co., ltd. all rights reserved. 26.oct.2015 rev.002 www.rohm.com tsz22111 15 001 bu26154muv revision history date revision changes 23.jun.2014 001 rev.001 first revision release 26.oct.2015 002 p1. change the height of package p4. change the application circuit p13. change the vmic reference voltage (spvdd=> hvdd) p38, p48,p49,p50,p51,p73 register function explanation and register details explanation - removed mclkoe bit and adcren bit - added analog input power management, speaker amplifier power management registers mapcon setting - changed zcen explanation(pdatt => effect volume) - added the explanation of playback digital a ttenuator control register /b ffh setting - changed hplsen bit of audi o analog contol2 register downloaded from: http:///
datasheet d a t a s h e e t notice-pga-e rev.00 2 ? 2015 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (specific applications), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hms products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation depending on ambient temperature. when used in sealed area, c onfirm that it is the use in the range that does not exceed t he maximum junction temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. if the flow sol dering method is preferred on a surface-mount products, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
datasheet d a t a s h e e t notice-pga-e rev.00 2 ? 2015 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own indepen dent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohms internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since concerned goods might be fallen under listed items of export control prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. rohm shall not have any obligations where the claims, actions or demands arising from the co mbination of the products with other articles such as components, circuits, systems or external equipment (including software). 3. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the products or the informati on contained in this document. pr ovided, however, that rohm will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the produc ts, subject to the terms and conditions herein. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice C we rev.001 ? 201 5 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

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